>Number:         31364
>Category:       kern
>Synopsis:       cmd680 IDE controller not configured properly.
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    kern-bug-people
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Wed Sep 21 13:13:01 +0000 2005
>Originator:     Douglas Fraser
>Release:        2.0.2
>Organization:
Flarion Technologies INc
>Environment:
Cross build of evbppc from i386 host.

NetBSD skor-bbu0 2.0.2-01.12 NetBSD 2.0.2-01.12 (TUCKERMAN) #0: Tue Sep 13 18:47:48 UTC 2005  dbronstein@fastbreak:/usr/work/dbronstein/netbsd.BUILD/obj-ppc/usr/work/dbronstein/netbsd2.0112/sys/arch/evbppc/compile/TUCKERMAN evbppc

>Description:
The file:

netbsd2/sys/dev/pci/cmdide.c

improperly sets control registers on lines 592 and 599.
In each case, it writes correctly on the preceding line
to 'off', but the subsequent line should write to off+1.

This sets up the timing improperly, so disk throughput
is much lower than it should be.

A context diff is presented below in the 'Fix' box...

>How-To-Repeat:

>Fix:
*** old_cmdide.c	Wed Sep 21 09:01:20 2005
--- cmdide.c	Wed Sep 21 09:04:29 2005
***************
*** 589,602 ****
  			off = 0xa8 + chp->ch_channel * 16 + drive * 2;
  			val = dma_tbl[drvp->DMA_mode];
  			pciide_pci_write(pc, pa, off, val & 0xff);
! 			pciide_pci_write(pc, pa, off, val >> 8);
  			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
  		} else {
  			mode |= 0x01 << (drive * 4);
  			off = 0xa4 + chp->ch_channel * 16 + drive * 2;
  			val = pio_tbl[drvp->PIO_mode];
  			pciide_pci_write(pc, pa, off, val & 0xff);
! 			pciide_pci_write(pc, pa, off, val >> 8);
  		}
  	}
  
--- 589,602 ----
  			off = 0xa8 + chp->ch_channel * 16 + drive * 2;
  			val = dma_tbl[drvp->DMA_mode];
  			pciide_pci_write(pc, pa, off, val & 0xff);
! 			pciide_pci_write(pc, pa, off+1, val >> 8);
  			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
  		} else {
  			mode |= 0x01 << (drive * 4);
  			off = 0xa4 + chp->ch_channel * 16 + drive * 2;
  			val = pio_tbl[drvp->PIO_mode];
  			pciide_pci_write(pc, pa, off, val & 0xff);
! 			pciide_pci_write(pc, pa, off+1, val >> 8);
  		}
  	}