Subject: Re: port-mips/31910: mips bus_space implementation doesn't support
To: None <port-mips-maintainer@netbsd.org, gnats-admin@netbsd.org,>
From: Garrett D'Amore <garrett_damore@tadpole.com>
List: netbsd-bugs
Date: 10/24/2005 23:51:01
The following reply was made to PR port-mips/31910; it has been noted by GNATS.
From: "Garrett D'Amore" <garrett_damore@tadpole.com>
To: gnats-bugs@netbsd.org
Cc:
Subject: Re: port-mips/31910: mips bus_space implementation doesn't support
mismatched cpu/bus endianness
Date: Mon, 24 Oct 2005 16:50:37 -0700
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Attached are the diffs to fix this problem. Note also this addresses
the problems in the code with unimplemented support for read_8 and
write_8, and support for stride lengths of up to 64-bits as well.
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Index: sys/arch/mips/include/bus_space.h
===================================================================
RCS file: /net/projects/meteor/cvs/netbsd/src/sys/arch/mips/include/bus_space.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -c -r1.1.1.1 -r1.2
*** sys/arch/mips/include/bus_space.h 29 Sep 2005 16:42:47 -0000 1.1.1.1
--- sys/arch/mips/include/bus_space.h 24 Oct 2005 07:21:57 -0000 1.2
***************
*** 70,75 ****
--- 70,78 ----
#include <sys/types.h>
#ifdef _KERNEL
+
+ #define __BUS_SPACE_HAS_STREAM_METHODS 1
+
/*
* Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
*/
***************
*** 210,215 ****
--- 213,274 ----
void (*bs_wr_8)(void *, bus_space_handle_t, bus_size_t,
const uint64_t *, bus_size_t);
+ /* read (single) stream */
+ uint8_t (*bs_rs_1)(void *, bus_space_handle_t, bus_size_t);
+ uint16_t (*bs_rs_2)(void *, bus_space_handle_t, bus_size_t);
+ uint32_t (*bs_rs_4)(void *, bus_space_handle_t, bus_size_t);
+ uint64_t (*bs_rs_8)(void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple stream */
+ void (*bs_rms_1)(void *, bus_space_handle_t, bus_size_t,
+ uint8_t *, bus_size_t);
+ void (*bs_rms_2)(void *, bus_space_handle_t, bus_size_t,
+ uint16_t *, bus_size_t);
+ void (*bs_rms_4)(void *, bus_space_handle_t, bus_size_t,
+ uint32_t *, bus_size_t);
+ void (*bs_rms_8)(void *, bus_space_handle_t, bus_size_t,
+ uint64_t *, bus_size_t);
+
+ /* read region stream */
+ void (*bs_rrs_1)(void *, bus_space_handle_t, bus_size_t,
+ uint8_t *, bus_size_t);
+ void (*bs_rrs_2)(void *, bus_space_handle_t, bus_size_t,
+ uint16_t *, bus_size_t);
+ void (*bs_rrs_4)(void *, bus_space_handle_t, bus_size_t,
+ uint32_t *, bus_size_t);
+ void (*bs_rrs_8)(void *, bus_space_handle_t, bus_size_t,
+ uint64_t *, bus_size_t);
+
+ /* write (single) stream */
+ void (*bs_ws_1)(void *, bus_space_handle_t, bus_size_t,
+ uint8_t);
+ void (*bs_ws_2)(void *, bus_space_handle_t, bus_size_t,
+ uint16_t);
+ void (*bs_ws_4)(void *, bus_space_handle_t, bus_size_t,
+ uint32_t);
+ void (*bs_ws_8)(void *, bus_space_handle_t, bus_size_t,
+ uint64_t);
+
+ /* write multiple stream */
+ void (*bs_wms_1)(void *, bus_space_handle_t, bus_size_t,
+ const uint8_t *, bus_size_t);
+ void (*bs_wms_2)(void *, bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void (*bs_wms_4)(void *, bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void (*bs_wms_8)(void *, bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
+ /* write region stream */
+ void (*bs_wrs_1)(void *, bus_space_handle_t, bus_size_t,
+ const uint8_t *, bus_size_t);
+ void (*bs_wrs_2)(void *, bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void (*bs_wrs_4)(void *, bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void (*bs_wrs_8)(void *, bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
/* set multiple */
void (*bs_sm_1)(void *, bus_space_handle_t, bus_size_t,
uint8_t, bus_size_t);
***************
*** 260,273 ****
#define __bs_c(a,b) __CONCAT(a,b)
#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
! #define __bs_rs(sz, tn, t, h, o) \
(__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \
! (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o))
! #define __bs_ws(sz, tn, t, h, o, v) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
! (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v); \
} while (0)
#define __bs_nonsingle(type, sz, tn, t, h, o, a, c) \
--- 319,332 ----
#define __bs_c(a,b) __CONCAT(a,b)
#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
! #define __bs_r(type, sz, tn, t, h, o) \
(__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \
! (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o))
! #define __bs_w(type, sz, tn, t, h, o, v) \
do { \
__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \
! (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v); \
} while (0)
#define __bs_nonsingle(type, sz, tn, t, h, o, a, c) \
***************
*** 346,359 ****
#define BUS_SPACE_BARRIER_READ 0x01
#define BUS_SPACE_BARRIER_WRITE 0x02
/*
* Bus read (single) operations.
*/
! #define bus_space_read_1(t, h, o) __bs_rs(1,uint8_t,(t),(h),(o))
! #define bus_space_read_2(t, h, o) __bs_rs(2,uint16_t,(t),(h),(o))
! #define bus_space_read_4(t, h, o) __bs_rs(4,uint32_t,(t),(h),(o))
! #define bus_space_read_8(t, h, o) __bs_rs(8,uint64_t,(t),(h),(o))
/*
--- 405,438 ----
#define BUS_SPACE_BARRIER_READ 0x01
#define BUS_SPACE_BARRIER_WRITE 0x02
+ /*
+ * New style.
+ */
+ #define BUS_SPACE_BARRIER_SYNC 0x03
+ #define BUS_SPACE_READ_BEFORE_READ BUS_SPACE_BARRIER_READ
+ #define BUS_SPACE_READ_BEFORE_WRITE BUS_SPACE_BARRIER_READ
+ #define BUS_SPACE_WRITE_BEFORE_READ BUS_SPACE_BARRIER_WRITE
+ #define BUS_SPACE_WRITE_BEFORE_WRITE BUS_SPACE_BARRIER_WRITE
/*
* Bus read (single) operations.
*/
! #define bus_space_read_1(t, h, o) \
! __bs_r(r,1,uint8_t,(t),(h),(o))
! #define bus_space_read_2(t, h, o) \
! __bs_r(r,2,uint16_t,(t),(h),(o))
! #define bus_space_read_4(t, h, o) \
! __bs_r(r,4,uint32_t,(t),(h),(o))
! #define bus_space_read_8(t, h, o) \
! __bs_r(r,8,uint64_t,(t),(h),(o))
! #define bus_space_read_stream_1(t, h, o) \
! __bs_r(rs,1,uint8_t,(t),(h),(o))
! #define bus_space_read_stream_2(t, h, o) \
! __bs_r(rs,2,uint16_t,(t),(h),(o))
! #define bus_space_read_stream_4(t, h, o) \
! __bs_r(rs,4,uint32_t,(t),(h),(o))
! #define bus_space_read_stream_8(t, h, o) \
! __bs_r(rs,8,uint64_t,(t),(h),(o))
/*
***************
*** 367,372 ****
--- 446,459 ----
__bs_nonsingle(rm,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_read_multi_8(t, h, o, a, c) \
__bs_nonsingle(rm,8,uint64_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_multi_stream_1(t, h, o, a, c) \
+ __bs_nonsingle(rms,1,uint8_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_multi_stream_2(t, h, o, a, c) \
+ __bs_nonsingle(rms,2,uint16_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_multi_stream_4(t, h, o, a, c) \
+ __bs_nonsingle(rms,4,uint32_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_multi_stream_8(t, h, o, a, c) \
+ __bs_nonsingle(rms,8,uint64_t,(t),(h),(o),(a),(c))
/*
***************
*** 380,394 ****
__bs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_8(t, h, o, a, c) \
__bs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c))
/*
* Bus write (single) operations.
*/
! #define bus_space_write_1(t, h, o, v) __bs_ws(1,uint8_t,(t),(h),(o),(v))
! #define bus_space_write_2(t, h, o, v) __bs_ws(2,uint16_t,(t),(h),(o),(v))
! #define bus_space_write_4(t, h, o, v) __bs_ws(4,uint32_t,(t),(h),(o),(v))
! #define bus_space_write_8(t, h, o, v) __bs_ws(8,uint64_t,(t),(h),(o),(v))
/*
--- 467,501 ----
__bs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_read_region_8(t, h, o, a, c) \
__bs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_region_stream_1(t, h, o, a, c) \
+ __bs_nonsingle(rrs,1,uint8_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_region_stream_2(t, h, o, a, c) \
+ __bs_nonsingle(rrs,2,uint16_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_region_stream_4(t, h, o, a, c) \
+ __bs_nonsingle(rrs,4,uint32_t,(t),(h),(o),(a),(c))
+ #define bus_space_read_region_stream_8(t, h, o, a, c) \
+ __bs_nonsingle(rrs,8,uint64_t,(t),(h),(o),(a),(c))
/*
* Bus write (single) operations.
*/
! #define bus_space_write_1(t, h, o, v) \
! __bs_w(w,1,uint8_t,(t),(h),(o),(v))
! #define bus_space_write_2(t, h, o, v) \
! __bs_w(w,2,uint16_t,(t),(h),(o),(v))
! #define bus_space_write_4(t, h, o, v) \
! __bs_w(w,4,uint32_t,(t),(h),(o),(v))
! #define bus_space_write_8(t, h, o, v) \
! __bs_w(w,8,uint64_t,(t),(h),(o),(v))
! #define bus_space_write_stream_1(t, h, o, v) \
! __bs_w(ws,1,uint8_t,(t),(h),(o),(v))
! #define bus_space_write_stream_2(t, h, o, v) \
! __bs_w(ws,2,uint16_t,(t),(h),(o),(v))
! #define bus_space_write_stream_4(t, h, o, v) \
! __bs_w(ws,4,uint32_t,(t),(h),(o),(v))
! #define bus_space_write_stream_8(t, h, o, v) \
! __bs_w(ws,8,uint64_t,(t),(h),(o),(v))
/*
***************
*** 402,407 ****
--- 509,522 ----
__bs_nonsingle(wm,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_write_multi_8(t, h, o, a, c) \
__bs_nonsingle(wm,8,uint64_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_multi_stream_1(t, h, o, a, c) \
+ __bs_nonsingle(wms,1,uint8_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_multi_stream_2(t, h, o, a, c) \
+ __bs_nonsingle(wms,2,uint16_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_multi_stream_4(t, h, o, a, c) \
+ __bs_nonsingle(wms,4,uint32_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_multi_stream_8(t, h, o, a, c) \
+ __bs_nonsingle(wms,8,uint64_t,(t),(h),(o),(a),(c))
/*
***************
*** 415,420 ****
--- 530,543 ----
__bs_nonsingle(wr,4,uint32_t,(t),(h),(o),(a),(c))
#define bus_space_write_region_8(t, h, o, a, c) \
__bs_nonsingle(wr,8,uint64_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_region_stream_1(t, h, o, a, c) \
+ __bs_nonsingle(wrs,1,uint8_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_region_stream_2(t, h, o, a, c) \
+ __bs_nonsingle(wrs,2,uint16_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_region_stream_4(t, h, o, a, c) \
+ __bs_nonsingle(wrs,4,uint32_t,(t),(h),(o),(a),(c))
+ #define bus_space_write_region_stream_8(t, h, o, a, c) \
+ __bs_nonsingle(wrs,8,uint64_t,(t),(h),(o),(a),(c))
/*
***************
*** 455,488 ****
#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
__bs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c))
! /*
! * Bus stream operations--defined in terms of non-stream counterparts
! */
! #define __BUS_SPACE_HAS_STREAM_METHODS 1
! #define bus_space_read_stream_1 bus_space_read_1
! #define bus_space_read_stream_2 bus_space_read_2
! #define bus_space_read_stream_4 bus_space_read_4
! #define bus_space_read_stream_8 bus_space_read_8
! #define bus_space_read_multi_stream_1 bus_space_read_multi_1
! #define bus_space_read_multi_stream_2 bus_space_read_multi_2
! #define bus_space_read_multi_stream_4 bus_space_read_multi_4
! #define bus_space_read_multi_stream_8 bus_space_read_multi_8
! #define bus_space_read_region_stream_1 bus_space_read_region_1
! #define bus_space_read_region_stream_2 bus_space_read_region_2
! #define bus_space_read_region_stream_4 bus_space_read_region_4
! #define bus_space_read_region_stream_8 bus_space_read_region_8
! #define bus_space_write_stream_1 bus_space_write_1
! #define bus_space_write_stream_2 bus_space_write_2
! #define bus_space_write_stream_4 bus_space_write_4
! #define bus_space_write_stream_8 bus_space_write_8
! #define bus_space_write_multi_stream_1 bus_space_write_multi_1
! #define bus_space_write_multi_stream_2 bus_space_write_multi_2
! #define bus_space_write_multi_stream_4 bus_space_write_multi_4
! #define bus_space_write_multi_stream_8 bus_space_write_multi_8
! #define bus_space_write_region_stream_1 bus_space_write_region_1
! #define bus_space_write_region_stream_2 bus_space_write_region_2
! #define bus_space_write_region_stream_4 bus_space_write_region_4
! #define bus_space_write_region_stream_8 bus_space_write_region_8
#endif /* _KERNEL */
#endif /* _MIPS_BUS_SPACE_H_ */
--- 578,584 ----
#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
__bs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c))
!
#endif /* _KERNEL */
#endif /* _MIPS_BUS_SPACE_H_ */
Index: sys/arch/mips/mips/bus_space_alignstride_chipdep.c
===================================================================
RCS file: /net/projects/meteor/cvs/netbsd/src/sys/arch/mips/mips/bus_space_alignstride_chipdep.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -c -r1.1.1.1 -r1.2
*** sys/arch/mips/mips/bus_space_alignstride_chipdep.c 29 Sep 2005 16:42:50 -0000 1.1.1.1
--- sys/arch/mips/mips/bus_space_alignstride_chipdep.c 24 Oct 2005 07:21:57 -0000 1.2
***************
*** 79,84 ****
--- 79,90 ----
* CHIP_EX_STORE_SIZE
* Size of the device-provided static storage area
* for the memory or I/O memory space extent.
+ * CHIP_LITTLE_ENDIAN | CHIP_BIG_ENDIAN
+ * For endian-specific busses, like PCI (little).
+ * CHIP_ACCESS_SIZE
+ * Size (in bytes) of minimum bus access, e.g. 4
+ * to indicate all bus cycles are 32-bits. Defaults
+ * to 1, indicating any access size is valid.
*/
#include <sys/cdefs.h>
***************
*** 103,108 ****
--- 109,158 ----
#define __BS(A) __C(__C(CHIP,_bus_mem_),A)
#endif
+ #if defined(CHIP_LITTLE_ENDIAN)
+ #define CHIP_SWAP16(x) letoh16(x)
+ #define CHIP_SWAP32(x) letoh32(x)
+ #define CHIP_SWAP64(x) letoh64(x)
+ #define CHIP_NEED_STREAM 1
+ #elif defined(CHIP_BIG_ENDIAN)
+ #define CHIP_SWAP16(x) betoh16(x)
+ #define CHIP_SWAP32(x) betoh32(x)
+ #define CHIP_SWAP64(x) betoh64(x)
+ #define CHIP_NEED_STREAM 1
+ #else
+ #define CHIP_SWAP16(x) (x)
+ #define CHIP_SWAP32(x) (x)
+ #define CHIP_SWAP64(x) (x)
+ #endif
+
+ #ifndef CHIP_ACCESS_SIZE
+ #define CHIP_ACCESS_SIZE 1
+ #endif
+
+ #if CHIP_ACCESS_SIZE == 1
+ #define CHIP_TYPE uint8_t
+ #define CHIP_SWAP(x) (x)
+ #endif
+
+ #if CHIP_ACCESS_SIZE == 2
+ #define CHIP_TYPE uint16_t
+ #define CHIP_SWAP(x) CHIP_SWAP16(x)
+ #endif
+
+ #if CHIP_ACCESS_SIZE == 4
+ #define CHIP_TYPE uint32_t
+ #define CHIP_SWAP(x) CHIP_SWAP32(x)
+ #endif
+
+ #if CHIP_ACCESS_SIZE == 8
+ #define CHIP_TYPE uint64_t
+ #define CHIP_SWAP(x) CHIP_SWAP64(x)
+ #endif
+
+ #ifndef CHIP_TYPE
+ #error "Invalid chip access size!"
+ #endif
+
/* mapping/unmapping */
int __BS(map)(void *, bus_addr_t, bus_size_t, int,
bus_space_handle_t *, int);
***************
*** 213,218 ****
--- 263,324 ----
void __BS(copy_region_8)(void *, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
+ #ifdef CHIP_NEED_STREAM
+
+ /* read (single), stream */
+ inline uint8_t __BS(read_stream_1)(void *, bus_space_handle_t, bus_size_t);
+ inline uint16_t __BS(read_stream_2)(void *, bus_space_handle_t, bus_size_t);
+ inline uint32_t __BS(read_stream_4)(void *, bus_space_handle_t, bus_size_t);
+ inline uint64_t __BS(read_stream_8)(void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple, stream */
+ void __BS(read_multi_stream_1)(void *, bus_space_handle_t, bus_size_t,
+ uint8_t *, bus_size_t);
+ void __BS(read_multi_stream_2)(void *, bus_space_handle_t, bus_size_t,
+ uint16_t *, bus_size_t);
+ void __BS(read_multi_stream_4)(void *, bus_space_handle_t, bus_size_t,
+ uint32_t *, bus_size_t);
+ void __BS(read_multi_stream_8)(void *, bus_space_handle_t, bus_size_t,
+ uint64_t *, bus_size_t);
+
+ /* read region, stream */
+ void __BS(read_region_stream_1)(void *, bus_space_handle_t, bus_size_t,
+ uint8_t *, bus_size_t);
+ void __BS(read_region_stream_2)(void *, bus_space_handle_t, bus_size_t,
+ uint16_t *, bus_size_t);
+ void __BS(read_region_stream_4)(void *, bus_space_handle_t, bus_size_t,
+ uint32_t *, bus_size_t);
+ void __BS(read_region_stream_8)(void *, bus_space_handle_t, bus_size_t,
+ uint64_t *, bus_size_t);
+
+ /* write (single), stream */
+ inline void __BS(write_stream_1)(void *, bus_space_handle_t, bus_size_t, uint8_t);
+ inline void __BS(write_stream_2)(void *, bus_space_handle_t, bus_size_t, uint16_t);
+ inline void __BS(write_stream_4)(void *, bus_space_handle_t, bus_size_t, uint32_t);
+ inline void __BS(write_stream_8)(void *, bus_space_handle_t, bus_size_t, uint64_t);
+
+ /* write multiple, stream */
+ void __BS(write_multi_stream_1)(void *, bus_space_handle_t, bus_size_t,
+ const uint8_t *, bus_size_t);
+ void __BS(write_multi_stream_2)(void *, bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void __BS(write_multi_stream_4)(void *, bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void __BS(write_multi_stream_8)(void *, bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
+ /* write region, stream */
+ void __BS(write_region_stream_1)(void *, bus_space_handle_t, bus_size_t,
+ const uint8_t *, bus_size_t);
+ void __BS(write_region_stream_2)(void *, bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void __BS(write_region_stream_4)(void *, bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void __BS(write_region_stream_8)(void *, bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
+ #endif /* CHIP_NEED_STREAM */
+
#ifdef CHIP_EXTENT
#ifndef CHIP_EX_STORE
static long
***************
*** 226,231 ****
--- 332,361 ----
#define CHIP_ALIGN_STRIDE 0
#endif
+ #if CHIP_ALIGN_STRIDE > 0
+ #define CHIP_OFF8(o) ((o) << (CHIP_ALIGN_STRIDE))
+ #else
+ #define CHIP_OFF8(o) (o)
+ #endif
+
+ #if CHIP_ALIGN_STRIDE > 1
+ #define CHIP_OFF16(o) ((o) << (CHIP_ALIGN_STRIDE - 1))
+ #else
+ #define CHIP_OFF16(o) (o)
+ #endif
+
+ #if CHIP_ALIGN_STRIDE > 2
+ #define CHIP_OFF32(o) ((o) << (CHIP_ALIGN_STRIDE - 2))
+ #else
+ #define CHIP_OFF32(o) (o)
+ #endif
+
+ #if CHIP_ALIGN_STRIDE > 3
+ #define CHIP_OFF64(o) ((o) << (CHIP_ALIGN_STRIDE - 3))
+ #else
+ #define CHIP_OFF64(o) (o)
+ #endif
+
void
__BS(init)(bus_space_tag_t t, void *v)
{
***************
*** 315,320 ****
--- 445,526 ----
t->bs_c_4 = __BS(copy_region_4);
t->bs_c_8 = __BS(copy_region_8);
+ #ifdef CHIP_NEED_STREAM
+ /* read (single), stream */
+ t->bs_rs_1 = __BS(read_stream_1);
+ t->bs_rs_2 = __BS(read_stream_2);
+ t->bs_rs_4 = __BS(read_stream_4);
+ t->bs_rs_8 = __BS(read_stream_8);
+
+ /* read multiple, stream */
+ t->bs_rms_1 = __BS(read_multi_stream_1);
+ t->bs_rms_2 = __BS(read_multi_stream_2);
+ t->bs_rms_4 = __BS(read_multi_stream_4);
+ t->bs_rms_8 = __BS(read_multi_stream_8);
+
+ /* read region, stream */
+ t->bs_rrs_1 = __BS(read_region_stream_1);
+ t->bs_rrs_2 = __BS(read_region_stream_2);
+ t->bs_rrs_4 = __BS(read_region_stream_4);
+ t->bs_rrs_8 = __BS(read_region_stream_8);
+
+ /* write (single), stream */
+ t->bs_ws_1 = __BS(write_stream_1);
+ t->bs_ws_2 = __BS(write_stream_2);
+ t->bs_ws_4 = __BS(write_stream_4);
+ t->bs_ws_8 = __BS(write_stream_8);
+
+ /* write multiple, stream */
+ t->bs_wms_1 = __BS(write_multi_stream_1);
+ t->bs_wms_2 = __BS(write_multi_stream_2);
+ t->bs_wms_4 = __BS(write_multi_stream_4);
+ t->bs_wms_8 = __BS(write_multi_stream_8);
+
+ /* write region, stream */
+ t->bs_wrs_1 = __BS(write_region_stream_1);
+ t->bs_wrs_2 = __BS(write_region_stream_2);
+ t->bs_wrs_4 = __BS(write_region_stream_4);
+ t->bs_wrs_8 = __BS(write_region_stream_8);
+
+ #else /* CHIP_NEED_STREAM */
+
+ /* read (single), stream */
+ t->bs_rs_1 = __BS(read_1);
+ t->bs_rs_2 = __BS(read_2);
+ t->bs_rs_4 = __BS(read_4);
+ t->bs_rs_8 = __BS(read_8);
+
+ /* read multiple, stream */
+ t->bs_rms_1 = __BS(read_multi_1);
+ t->bs_rms_2 = __BS(read_multi_2);
+ t->bs_rms_4 = __BS(read_multi_4);
+ t->bs_rms_8 = __BS(read_multi_8);
+
+ /* read region, stream */
+ t->bs_rrs_1 = __BS(read_region_1);
+ t->bs_rrs_2 = __BS(read_region_2);
+ t->bs_rrs_4 = __BS(read_region_4);
+ t->bs_rrs_8 = __BS(read_region_8);
+
+ /* write (single), stream */
+ t->bs_ws_1 = __BS(write_1);
+ t->bs_ws_2 = __BS(write_2);
+ t->bs_ws_4 = __BS(write_4);
+ t->bs_ws_8 = __BS(write_8);
+
+ /* write multiple, stream */
+ t->bs_wms_1 = __BS(write_multi_1);
+ t->bs_wms_2 = __BS(write_multi_2);
+ t->bs_wms_4 = __BS(write_multi_4);
+ t->bs_wms_8 = __BS(write_multi_8);
+
+ /* write region, stream */
+ t->bs_wrs_1 = __BS(write_region_1);
+ t->bs_wrs_2 = __BS(write_region_2);
+ t->bs_wrs_4 = __BS(write_region_4);
+ t->bs_wrs_8 = __BS(write_region_8);
+ #endif /* CHIP_NEED_STREAM */
+
#ifdef CHIP_EXTENT
/* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
ex = extent_create(__S(__BS(bus)), 0x0UL, 0xffffffffUL, M_DEVBUF,
***************
*** 716,785 ****
inline uint8_t
__BS(read_1)(void *v, bus_space_handle_t h, bus_size_t off)
{
! #ifdef CHIP_ACCESSTYPE
! volatile CHIP_ACCESSTYPE *ptr = (void *)(h + (off << CHIP_ALIGN_STRIDE));
! CHIP_ACCESSTYPE rval;
!
! rval = *ptr;
! return (rval & 0xff); /* XXX BigEndian safe? */
! #else /* !CHIP_ACCESSTYPE */
! volatile uint8_t *ptr = (void *)(h + (off << CHIP_ALIGN_STRIDE));
return (*ptr);
! #endif /* !CHIP_ACCESSTYPE */
}
inline uint16_t
__BS(read_2)(void *v, bus_space_handle_t h, bus_size_t off)
{
! #ifdef CHIP_ACCESSTYPE
! #if CHIP_ALIGN_STRIDE >= 1
! volatile CHIP_ACCESSTYPE *ptr = (void *)(h + (off << (CHIP_ALIGN_STRIDE - 1)));
! #else
! volatile CHIP_ACCESSTYPE *ptr = (void *)(h + off);
! #endif
! CHIP_ACCESSTYPE rval;
!
! rval = *ptr;
! return (rval & 0xffff); /* XXX BigEndian safe? */
! #else /* !CHIP_ACCESSTYPE */
! #if CHIP_ALIGN_STRIDE >= 1
! volatile uint16_t *ptr = (void *)(h + (off << (CHIP_ALIGN_STRIDE - 1)));
! #else
! volatile uint16_t *ptr = (void *)(h + off);
! #endif
! return (*ptr);
! #endif /* !CHIP_ACCESSTYPE */
}
inline uint32_t
__BS(read_4)(void *v, bus_space_handle_t h, bus_size_t off)
{
! /* XXX XXX XXX should use CHIP_ACCESSTYPE if it's > 32bits */
! #if CHIP_ALIGN_STRIDE >= 2
! volatile uint32_t *ptr = (void *)(h + (off << (CHIP_ALIGN_STRIDE - 2)));
! #else
! volatile uint32_t *ptr = (void *)(h + off);
! #endif
! return (*ptr);
}
inline uint64_t
__BS(read_8)(void *v, bus_space_handle_t h, bus_size_t off)
{
! /* XXX XXX XXX */
! panic("%s not implemented", __S(__BS(read_8)));
}
#define CHIP_read_multi_N(BYTES,TYPE) \
void \
__C(__BS(read_multi_),BYTES)(void *v, bus_space_handle_t h, \
bus_size_t o, TYPE *a, bus_size_t c) \
{ \
- \
while (c-- > 0) { \
__BS(barrier)(v, h, o, sizeof *a, \
BUS_SPACE_BARRIER_READ); \
--- 922,986 ----
inline uint8_t
__BS(read_1)(void *v, bus_space_handle_t h, bus_size_t off)
{
! #if CHIP_ACCESS_SIZE > 1
! volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF8(off));
! CHIP_TYPE rval;
!
! rval = CHIP_SWAP(*ptr);
! return (rval & 0xff);
! #else /* CHIP_ACCESS_SIZE > 1 */
! volatile uint8_t *ptr = (void *)(h + CHIP_OFF8(off));
return (*ptr);
! #endif /* CHIP_ACCESS_SIZE > 1 */
}
inline uint16_t
__BS(read_2)(void *v, bus_space_handle_t h, bus_size_t off)
{
! #if CHIP_ACCESS_SIZE > 2
! volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF16(off));
! CHIP_TYPE rval;
!
! rval = CHIP_SWAP(*ptr);
! return (rval & 0xffff);
! #else /* CHIP_ACCESS_SIZE > 2 */
! volatile uint16_t *ptr = (void *)(h + CHIP_OFF16(off));
! return CHIP_SWAP16(*ptr);
! #endif /* CHIP_ACCESS_SIZE > 2 */
}
inline uint32_t
__BS(read_4)(void *v, bus_space_handle_t h, bus_size_t off)
{
! #if CHIP_ACCESS_SIZE > 4
! volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF32(off));
! CHIP_TYPE rval;
!
! rval = CHIP_SWAP(*ptr);
! return (rval & 0xffffffff);
! #else /* CHIP_ACCESS_SIZE > 4 */
! volatile uint32_t *ptr = (void *)(h + CHIP_OFF32(off));
! return CHIP_SWAP32(*ptr);
! #endif
}
inline uint64_t
__BS(read_8)(void *v, bus_space_handle_t h, bus_size_t off)
{
+ volatile uint64_t *ptr = (void *)(h + CHIP_OFF64(off));
! return CHIP_SWAP64(*ptr);
}
+
#define CHIP_read_multi_N(BYTES,TYPE) \
void \
__C(__BS(read_multi_),BYTES)(void *v, bus_space_handle_t h, \
bus_size_t o, TYPE *a, bus_size_t c) \
{ \
while (c-- > 0) { \
__BS(barrier)(v, h, o, sizeof *a, \
BUS_SPACE_BARRIER_READ); \
***************
*** 796,802 ****
__C(__BS(read_region_),BYTES)(void *v, bus_space_handle_t h, \
bus_size_t o, TYPE *a, bus_size_t c) \
{ \
- \
while (c-- > 0) { \
*a++ = __C(__BS(read_),BYTES)(v, h, o); \
o += sizeof *a; \
--- 997,1002 ----
***************
*** 810,871 ****
inline void
__BS(write_1)(void *v, bus_space_handle_t h, bus_size_t off, uint8_t val)
{
! #ifdef CHIP_ACCESSTYPE
! volatile CHIP_ACCESSTYPE *ptr = (void *)(h + (off << CHIP_ALIGN_STRIDE));
! CHIP_ACCESSTYPE wval;
!
! wval = val & 0xff; /* XXX BigEndian safe? */
! *ptr = wval;
! #else /* !CHIP_ACCESSTYPE */
! volatile uint8_t *ptr = (void *)(h + (off << CHIP_ALIGN_STRIDE));
*ptr = val;
! #endif /* !CHIP_ACCESSTYPE */
}
inline void
__BS(write_2)(void *v, bus_space_handle_t h, bus_size_t off, uint16_t val)
{
! #ifdef CHIP_ACCESSTYPE
! #if CHIP_ALIGN_STRIDE >= 1
! volatile CHIP_ACCESSTYPE *ptr = (void *)(h + (off << (CHIP_ALIGN_STRIDE - 1)));
! #else
! volatile CHIP_ACCESSTYPE *ptr = (void *)(h + off);
! #endif
! CHIP_ACCESSTYPE wval;
!
! wval = val & 0xffff; /* XXX BigEndian safe? */
! *ptr = wval;
! #else /* !CHIP_ACCESSTYPE */
! #if CHIP_ALIGN_STRIDE >= 1
! volatile uint16_t *ptr = (void *)(h + (off << (CHIP_ALIGN_STRIDE - 1)));
! #else
! volatile uint16_t *ptr = (void *)(h + off);
! #endif
! *ptr = val;
! #endif /* !CHIP_ACCESSTYPE */
}
inline void
__BS(write_4)(void *v, bus_space_handle_t h, bus_size_t off, uint32_t val)
{
! /* XXX XXX XXX should use CHIP_ACCESSTYPE if it's > 32bits */
! #if CHIP_ALIGN_STRIDE >= 2
! volatile uint32_t *ptr = (void *)(h + (off << (CHIP_ALIGN_STRIDE - 2)));
! #else
! volatile uint32_t *ptr = (void *)(h + off);
! #endif
! *ptr = val;
}
inline void
__BS(write_8)(void *v, bus_space_handle_t h, bus_size_t off, uint64_t val)
{
! /* XXX XXX XXX */
! panic("%s not implemented", __S(__BS(write_8)));
}
#define CHIP_write_multi_N(BYTES,TYPE) \
--- 1010,1066 ----
inline void
__BS(write_1)(void *v, bus_space_handle_t h, bus_size_t off, uint8_t val)
{
! #if CHIP_ACCESS_SIZE > 1
! volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF8(off));
! CHIP_TYPE wval;
!
! wval = val & 0xff;
! *ptr = CHIP_SWAP(wval);
! #else /* CHIP_ACCESS_SIZE > 1 */
! volatile uint8_t *ptr = (void *)(h + CHIP_OFF8(off));
*ptr = val;
! #endif /* CHIP_ACCESS_SIZE > 1 */
}
inline void
__BS(write_2)(void *v, bus_space_handle_t h, bus_size_t off, uint16_t val)
{
! #if CHIP_ACCESS_SIZE > 2
! volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF16(off));
! CHIP_TYPE wval;
!
! wval = val & 0xffff;
! *ptr = CHIP_SWAP(wval);
! #else /* CHIP_ACCESS_SIZE > 2 */
! volatile uint16_t *ptr = (void *)(h + CHIP_OFF16(off));
! *ptr = CHIP_SWAP16(val);
! #endif /* CHIP_ACCESS_SIZE > 2 */
}
inline void
__BS(write_4)(void *v, bus_space_handle_t h, bus_size_t off, uint32_t val)
{
! #if CHIP_ACCESS_SIZE > 4
! volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF32(off));
! CHIP_TYPE wval;
! wval = val & 0xffffffff;
! *ptr = CHIP_SWAP(wval);
! #else /* CHIP_ACESSS_SIZE > 4 */
! volatile uint32_t *ptr = (void *)(h + CHIP_OFF32(off));
!
! *ptr = CHIP_SWAP32(val);
! #endif /* CHIP_ACCESS_SIZE > 4 */
}
inline void
__BS(write_8)(void *v, bus_space_handle_t h, bus_size_t off, uint64_t val)
{
+ volatile uint64_t *ptr = (void *)(h + CHIP_OFF64(off));
! *ptr = CHIP_SWAP64(val);
}
#define CHIP_write_multi_N(BYTES,TYPE) \
***************
*** 957,959 ****
--- 1152,1338 ----
CHIP_copy_region_N(2)
CHIP_copy_region_N(4)
CHIP_copy_region_N(8)
+
+ #ifdef CHIP_NEED_STREAM
+
+ inline uint8_t
+ __BS(read_stream_1)(void *v, bus_space_handle_t h, bus_size_t off)
+ {
+ #if CHIP_ACCESS_SIZE > 1
+ volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF8(off));
+ CHIP_TYPE rval;
+
+ rval = *ptr;
+ return (rval & 0xff);
+ #else /* CHIP_ACCESS_SIZE > 1 */
+ volatile uint8_t *ptr = (void *)(h + CHIP_OFF8(off));
+
+ return (*ptr);
+ #endif /* CHIP_ACCESS_SIZE > 1 */
+ }
+
+ inline uint16_t
+ __BS(read_stream_2)(void *v, bus_space_handle_t h, bus_size_t off)
+ {
+ #if CHIP_ACCESS_SIZE > 2
+ volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF16(off));
+ CHIP_TYPE rval;
+
+ rval = *ptr;
+ return (rval & 0xffff);
+ #else /* CHIP_ACCESS_SIZE > 2 */
+ volatile uint16_t *ptr = (void *)(h + CHIP_OFF16(off));
+
+ return (*ptr);
+ #endif /* CHIP_ACCESS_SIZE > 2 */
+ }
+
+ inline uint32_t
+ __BS(read_stream_4)(void *v, bus_space_handle_t h, bus_size_t off)
+ {
+ #if CHIP_ACCESS_SIZE > 4
+ volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF32(off));
+ CHIP_TYPE rval;
+
+ rval = *ptr;
+ return (rval & 0xffffffff);
+ #else /* CHIP_ACCESS_SIZE > 4 */
+ volatile uint32_t *ptr = (void *)(h + CHIP_OFF32(off));
+
+ return (*ptr);
+ #endif /* CHIP_ACCESS_SIZE > 4 */
+ }
+
+ inline uint64_t
+ __BS(read_stream_8)(void *v, bus_space_handle_t h, bus_size_t off)
+ {
+ volatile uint64_t *ptr = (void *)(h + CHIP_OFF64(off));
+
+ return (*ptr);
+ }
+
+ #define CHIP_read_multi_stream_N(BYTES,TYPE) \
+ void \
+ __C(__BS(read_multi_stream_),BYTES)(void *v, bus_space_handle_t h, \
+ bus_size_t o, TYPE *a, bus_size_t c) \
+ { \
+ while (c-- > 0) { \
+ __BS(barrier)(v, h, o, sizeof *a, \
+ BUS_SPACE_BARRIER_READ); \
+ *a++ = __C(__BS(read_stream_),BYTES)(v, h, o); \
+ } \
+ }
+ CHIP_read_multi_stream_N(1,uint8_t)
+ CHIP_read_multi_stream_N(2,uint16_t)
+ CHIP_read_multi_stream_N(4,uint32_t)
+ CHIP_read_multi_stream_N(8,uint64_t)
+
+ #define CHIP_read_region_stream_N(BYTES,TYPE) \
+ void \
+ __C(__BS(read_region_stream),BYTES)(void *v, bus_space_handle_t h, \
+ bus_size_t o, TYPE *a, bus_size_t c) \
+ { \
+ while (c-- > 0) { \
+ *a++ = __C(__BS(read_stream_),BYTES)(v, h, o); \
+ o += sizeof *a; \
+ } \
+ }
+ CHIP_read_region_stream_N(1,uint8_t)
+ CHIP_read_region_stream_N(2,uint16_t)
+ CHIP_read_region_stream_N(4,uint32_t)
+ CHIP_read_region_stream_N(8,uint64_t)
+
+ inline void
+ __BS(write_stream_1)(void *v, bus_space_handle_t h, bus_size_t off,
+ uint8_t val)
+ {
+ #if CHIP_ACCESS_SIZE > 1
+ volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF8(off));
+ CHIP_TYPE wval;
+
+ wval = val & 0xff;
+ *ptr = wval;
+ #else /* CHIP_ACCESS_SIZE > 1 */
+ volatile uint8_t *ptr = (void *)(h + CHIP_OFF8(off));
+
+ *ptr = val;
+ #endif /* CHIP_ACCESS_SIZE > 1 */
+ }
+
+ inline void
+ __BS(write_stream_2)(void *v, bus_space_handle_t h, bus_size_t off,
+ uint16_t val)
+ {
+ #if CHIP_ACCESS_SIZE > 2
+ volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF16(off));
+ CHIP_TYPE wval;
+
+ wval = val & 0xffff;
+ *ptr = wval;
+ #else /* CHIP_ACCESS_SIZE > 2 */
+ volatile uint16_t *ptr = (void *)(h + CHIP_OFF16(off));
+
+ *ptr = val;
+ #endif /* CHIP_ACCESS_SIZE > 2 */
+ }
+
+ inline void
+ __BS(write_stream_4)(void *v, bus_space_handle_t h, bus_size_t off,
+ uint32_t val)
+ {
+ #if CHIP_ACCESS_SIZE > 4
+ volatile CHIP_TYPE *ptr = (void *)(h + CHIP_OFF32(off));
+
+ CHIP_TYPE wval;
+ wval = val & 0xffffffff;
+ *ptr = wval;
+ #else /* CHIP_ACESSS_SIZE > 4 */
+ volatile uint32_t *ptr = (void *)(h + CHIP_OFF32(off));
+
+ *ptr = val;
+ #endif /* CHIP_ACCESS_SIZE > 4 */
+ }
+
+ inline void
+ __BS(write_stream_8)(void *v, bus_space_handle_t h, bus_size_t off,
+ uint64_t val)
+ {
+ volatile uint64_t *ptr = (void *)(h + CHIP_OFF64(off));
+
+ *ptr = CHIP_SWAP64(val);
+ }
+
+ #define CHIP_write_multi_stream_N(BYTES,TYPE) \
+ void \
+ __C(__BS(write_multi_stream_),BYTES)(void *v, bus_space_handle_t h, \
+ bus_size_t o, const TYPE *a, bus_size_t c) \
+ { \
+ \
+ while (c-- > 0) { \
+ __C(__BS(write_stream_),BYTES)(v, h, o, *a++); \
+ __BS(barrier)(v, h, o, sizeof *a, \
+ BUS_SPACE_BARRIER_WRITE); \
+ } \
+ }
+ CHIP_write_multi_stream_N(1,uint8_t)
+ CHIP_write_multi_stream_N(2,uint16_t)
+ CHIP_write_multi_stream_N(4,uint32_t)
+ CHIP_write_multi_stream_N(8,uint64_t)
+
+ #define CHIP_write_region_stream_N(BYTES,TYPE) \
+ void \
+ __C(__BS(write_region_stream_),BYTES)(void *v, bus_space_handle_t h, \
+ bus_size_t o, const TYPE *a, bus_size_t c) \
+ { \
+ \
+ while (c-- > 0) { \
+ __C(__BS(write_stream_),BYTES)(v, h, o, *a++); \
+ o += sizeof *a; \
+ } \
+ }
+ CHIP_write_region_stream_N(1,uint8_t)
+ CHIP_write_region_stream_N(2,uint16_t)
+ CHIP_write_region_stream_N(4,uint32_t)
+ CHIP_write_region_stream_N(8,uint64_t)
+
+ #endif /* CHIP_NEED_STREAM */
Index: sys/arch/mips/alchemy/au_cpureg_mem.c
===================================================================
RCS file: /net/projects/meteor/cvs/netbsd/src/sys/arch/mips/alchemy/au_cpureg_mem.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -c -r1.1.1.1 -r1.2
*** sys/arch/mips/alchemy/au_cpureg_mem.c 29 Sep 2005 16:42:45 -0000 1.1.1.1
--- sys/arch/mips/alchemy/au_cpureg_mem.c 24 Oct 2005 07:21:57 -0000 1.2
***************
*** 49,57 ****
#include <mips/alchemy/include/auvar.h>
#include <mips/alchemy/include/aubusvar.h>
! #define CHIP au_cpureg
! #define CHIP_MEM /* defined */
! #define CHIP_ACCESSTYPE uint32_t
/* MEM region 1 */
#define CHIP_W1_BUS_START(v) 0x00000000UL
--- 49,57 ----
#include <mips/alchemy/include/auvar.h>
#include <mips/alchemy/include/aubusvar.h>
! #define CHIP au_cpureg
! #define CHIP_MEM /* defined */
! #define CHIP_ACCESS_SIZE 4
/* MEM region 1 */
#define CHIP_W1_BUS_START(v) 0x00000000UL
--------------080608030401060108070304--