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Just had a closer look:

jdolecek@NetBSD.org said:
> cpu0: "Intel(R) Core(TM)2 CPU          6300  @ 1.86GHz"
> [...]
> 	According to:
> 	http://www.intel.com/products/processor_number/chart/core2duo.htm
> 	the FSB value for this particular model is 667 Mhz

Just checked, and what I'm seeing is that the bus speed should be 1066 MHz.

M.Drochner@fz-juelich.de said:
> 0 is illegal according to Intel's manual

And after looking at the newest version I'm seeing that "0"
does indeed mean FSB1067, which is a bus clock of 267 MHz.

jdolecek@NetBSD.org said:
>                         bus_clock = 6666; 

That would be a 26667, but generally it should be OK.
I'd suggest the appended patch, which contains one more
new bus speed, and a minor rounding fix, and a cache
descriptor entry useful on my box.

best regards
Matthias



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Index: arch/i386/i386/identcpu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/i386/i386/identcpu.c,v
retrieving revision 1.49
diff -u -p -r1.49 identcpu.c
--- arch/i386/i386/identcpu.c	15 Nov 2006 19:18:33 -0000	1.49
+++ arch/i386/i386/identcpu.c	15 Nov 2006 21:18:43 -0000
@@ -80,6 +80,7 @@ intel_cpuid_cache_info[] = {
 	{ CAI_L2CACHE,  0x43,  4,      512 * 1024, 32, NULL },
 	{ CAI_L2CACHE,  0x44,  4, 1 * 1024 * 1024, 32, NULL },
 	{ CAI_L2CACHE,  0x45,  4, 2 * 1024 * 1024, 32, NULL },
+	{ CAI_L2CACHE,  0x49, 16, 4 * 1024 * 1024, 64, NULL },
 	{ CAI_DCACHE,   0x66,  4,        8 * 1024, 64, NULL },
 	{ CAI_DCACHE,   0x67,  4,       16 * 1024, 64, NULL },
 	{ CAI_DCACHE,   0x2c,  8,       32 * 1024, 64, NULL },
@@ -973,7 +974,13 @@ p3_get_bus_clock(struct cpu_info *ci)
 			bus_clock = 13333;
 			break;
 		case 3:
-			bus_clock = 16666;
+			bus_clock = 16667;
+			break;
+		case 2:
+			bus_clock = 20000;
+			break;
+		case 0:
+			bus_clock = 26667;
 			break;
 		case 4:
 			bus_clock = 33333;

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