The following reply was made to PR kern/36995; it has been noted by GNATS.

From: Quentin Garnier <cube@cubidou.net>
To: gnats-bugs@NetBSD.org
Cc: jmcneill@invisible.ca
Subject: Re: kern/36995: ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo CPUs
Date: Mon, 17 Sep 2007 08:11:44 +0200

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 On Mon, Sep 17, 2007 at 01:55:00AM +0000, jmcneill@invisible.ca wrote:
 > >Number:         36995
 > >Category:       kern
 > >Synopsis:       ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo CPUs
 > >Confidential:   no
 > >Severity:       critical
 > >Priority:       high
 > >Responsible:    kern-bug-people
 > >State:          open
 > >Class:          sw-bug
 > >Submitter-Id:   net
 > >Arrival-Date:   Mon Sep 17 01:55:00 +0000 2007
 > >Originator:     jmcneill@invisible.ca
 > >Release:        NetBSD 4.99.30
 > >Organization:
 > =09
 > >Environment:
 > =09
 > =09
 > System: NetBSD black.invisible.ca 4.99.30 NetBSD 4.99.30 (GENERIC) #47: S=
 un Sep 16 21:41:28 EDT 2007 jmcneill@black.invisible.ca:/export/home/jmcnei=
 ll/branches/jmcneill-pm/src/sys/arch/amd64/compile/GENERIC amd64
 > Architecture: x86_64
 > Machine: amd64
 > >Description:
 > Later Core 2 Duo CPUs appear to have the ability to overclock
 > themselves using the enhanced speedstep API:
 >=20
 > cpu0 at mainbus0 apid 0: (boot processor)
 > cpu0: Intel(R) Core(TM)2 Duo CPU     T7100  @ 1.80GHz, 1795.65 MHz
 > cpu0: features: bffbfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
 > cpu0: features: bffbfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,B20,DS,ACPI,MMX>
 > cpu0: features: bffbfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
 > cpu0: features2: e3bd<SSE3,MONITOR,DS-CPL,VMX,EST,TM2,xTPR,PDCM>
 > cpu0: features3: bffbfbff<SYSCALL/SYSRET,XD,EM64T>
 > cpu0: L2 cache 2 MB 64B/line 8-way
 > cpu0: Enhanced SpeedStep (1420 mV) 2000 MHz
 > cpu0: unknown Enhanced SpeedStep CPU.
 > est_init_main: bus_clock =3D 20000
 > est_init_main: idlo =3D 0x617
 > est_init_main: lo  1068 mV, 1200 MHz
 > est_init_main: raw   23   ,    6   =20
 > est_init_main: idhi =3D 0xa2d
 > est_init_main: hi  1420 mV, 2000 MHz
 > est_init_main: raw   45   ,   10   =20
 > est_init_main: cur  =3D 0xa2d
 > est_init_main: fake entry 0: 1420 mV, 2000 MHz  MSR*100 mV =3D 1000 freq =
 =3D 4500
 > est_init_main: fake entry 1: 1340 mV, 1800 MHz  MSR*100 mV =3D  900 freq =
 =3D 3951
 > est_init_main: fake entry 2: 1260 mV, 1600 MHz  MSR*100 mV =3D  800 freq =
 =3D 3402
 > est_init_main: fake entry 3: 1164 mV, 1400 MHz  MSR*100 mV =3D  700 freq =
 =3D 2853
 > est_init_main: fake entry 4: 1084 mV, 1200 MHz  MSR*100 mV =3D  600 freq =
 =3D 2304
 > cpu0: Enhanced SpeedStep frequencies available (MHz): 2000 1800 1600 1400=
  1200
 >=20
 > machdep.est.frequency.target =3D 2000
 > machdep.est.frequency.current =3D 2000
 > machdep.est.frequency.available =3D 2000 1800 1600 1400 1200
 >=20
 > Since both ENHANCED_SPEEDSTEP and sysutils/estd assume that the highest v=
 alue
 > reported is the normal CPU speed, we erroneously overclock the CPU which
 > could cause serious hardware issues.
 
 Do we really overclock the CPU?  I thought this was that feature that
 allows one core to be boosted if the other one is idle...  Can't
 remember the name...
 
 --=20
 Quentin Garnier - cube@cubidou.net - cube@NetBSD.org
 "You could have made it, spitting out benchmarks
 Owe it to yourself not to fail"
 Amplifico, Spitting Out Benchmarks, Hometakes Vol. 2, 2005.
 
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