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Re: port-arm/54199: arm bus_dmamap_sync assertion failure
The following reply was made to PR port-arm/54199; it has been noted by GNATS.
From: Nick Hudson <nick.hudson%gmx.co.uk@localhost>
To: gnats-bugs%netbsd.org@localhost, thorpej%netbsd.org@localhost, gnats-admin%netbsd.org@localhost,
netbsd-bugs%netbsd.org@localhost, thorpej%me.com@localhost
Cc:
Subject: Re: port-arm/54199: arm bus_dmamap_sync assertion failure
Date: Tue, 14 May 2019 20:03:46 +0100
On 14/05/2019 14:20, Izumi Tsutsui wrote:
> The following reply was made to PR port-arm/54199; it has been noted by =
GNATS.
>
> From: Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>
> To: thorpej%me.com@localhost
> Cc: gnats-bugs%netbsd.org@localhost, jmcneill%invisible.ca@localhost, tsutsui%ceres.dti.ne@localhost.j=
p
> Subject: Re: port-arm/54199: arm bus_dmamap_sync assertion failure
> Date: Tue, 14 May 2019 22:17:21 +0900
>
> > > I have a question:
> > > Is it a valid operation to call bus_dmamap_load(9) and bus_dmamap_=
sync(9)
> > > with dmamap dm_mapsize =3D=3D 0?
>
> > Anyway, I would say that the API should be tolerant of these situati=
ons... If dm_mapsize =3D=3D 0, then allow offset =3D=3D 0 and len =3D=3D =
0. If dm_mapsize !=3D 0, still allow len =3D=3D 0, while enforcing offset=
invariants.
>
> I see. Thanks for your comment.
> (there are several MD code with such assertions)
>
> > Now, the bigger issue I have with this bug is why did sunxi_emac_int=
r() result in a zero-length bus_dmamap_sync()?
>
> No assertion in PREREAD/PREWRITE but in POST ops after xfers?
> With a quick glance, one possible path is failure of
> sunxi_emac_setup_rxbuf() in inlined sunxi_emac_rxintr()?
>
> Or, does it still happen even if BUS_DMA_COHERENT is specifed to
> bus_dmemem_map(9) for tx/rx descriptor memories?
> (i.e. possible race between CPU and DMA on updating descriptors?)
Does this help
https://github.com/skrll/src/commit/f783c83f2dbed515e6afe6ef7ee0e161181f7a=
10
Nick
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