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Re: port-hppa/56867: hppa: intermittent SIGSEGV reports in t_ptrace_wait's stepN and setstepN test cases
The following reply was made to PR port-hppa/56867; it has been noted by GNATS.
From: Nick Hudson <nick.hudson%gmx.co.uk@localhost>
To: gnats-bugs%netbsd.org@localhost, port-hppa-maintainer%netbsd.org@localhost,
gnats-admin%netbsd.org@localhost, netbsd-bugs%netbsd.org@localhost, tgl%sss.pgh.pa.us@localhost
Cc:
Subject: Re: port-hppa/56867: hppa: intermittent SIGSEGV reports in
t_ptrace_wait's stepN and setstepN test cases
Date: Fri, 10 Jun 2022 11:23:24 +0100
On 09/06/2022 06:40, Tom Lane wrote:
> The following reply was made to PR port-hppa/56867; it has been noted by=
GNATS.
>
> From: Tom Lane <tgl%sss.pgh.pa.us@localhost>
> To: gnats-bugs%netbsd.org@localhost
> Cc:
> Subject: Re: port-hppa/56867: hppa: intermittent SIGSEGV reports in t_pt=
race_wait's stepN and setstepN test cases
> Date: Thu, 09 Jun 2022 01:39:23 -0400
>
> I've managed to resurrect my NetBSD/hppa installation, and resumed
> investigating this issue.
YAY. :)
> My theory that there's something wrong with
> ITLBMISS processing seems to be backwards: after adding some hacky
> instrumentation, I found that the test passes when an ITLBMISS trap
> occurs upon trying to execute the modified instruction stream, while
> it fails when one does not. That led me to guess that what's missing
> is a TLB flush operation, and sure enough this quick-hack patch seems
> to fix it:
>
> Index: sys/arch/hppa/hppa/pmap.c
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> RCS file: /cvsroot/src/sys/arch/hppa/hppa/pmap.c,v
> retrieving revision 1.117
> diff -u -r1.117 pmap.c
> --- sys/arch/hppa/hppa/pmap.c 26 May 2022 05:34:04 -0000 1.117
> +++ sys/arch/hppa/hppa/pmap.c 9 Jun 2022 03:36:33 -0000
> @@ -1874,9 +1874,12 @@
> pmap_procwr(struct proc *p, vaddr_t va, size_t len)
> {
> pmap_t pmap =3D p->p_vmspace->vm_map.pmap;
> + pa_space_t sp =3D pmap->pm_space;
>
> - fdcache(pmap->pm_space, va, len);
> - ficache(pmap->pm_space, va, len);
> + fdcache(sp, va, len);
> + ficache(sp, va, len);
> + pdtlb(sp, va);
> + pitlb(sp, va);
> }
>
I dont this is right. The process mappings aren't changing. Will think
about it some more.
Thanks for poking at all of this.
Nick
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