Re: kern/57059 (amdgpu graphics ring test failing)

[Taylor R Campbell <riastradh%NetBSD.org@localhost>]

Can you please try the attached patch, and make sure you have
sys/arch/x86/x86/fpu.c rev. 1.87?

If it panics with

panic: fpu trap from kernel at XXX+123, trapframe 0x...

then please do:

$ gdb ./netbsd.gdb
(gdb) info line XXX+123

and share the output.

(This patch includes the first volatile patch, and some more.  Assumes
that -DCONFIG_DRM_AMD_DC=1 is set, since I committed that a few days
ago.)

From 7b1179f4154ef473a62ddb4f878e956c41b5c71b Mon Sep 17 00:00:00 2001
From: Taylor R Campbell <riastradh%NetBSD.org@localhost>
Date: Tue, 11 Jul 2023 17:09:57 +0000
Subject: [PATCH] amdgpu: Mark float-dependent variables volatile.

This way they are computed -- using FP instructions -- before
DC_FP_END, after which point FP instructions will trap or behave
unpredictably.

This is a workaround, not a proper solution -- really, the
DC_FP_START/END calls should happen in a separate compilation unit
built without -mhard-float or whatever, but that's a lot more work to
make happen for now.

XXX pullup-10
---
 .../drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c   | 6 +++---
 .../dist/drm/amd/display/dc/dcn20/amdgpu_dcn20_resource.c   | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c
index 2a169acdc48d..d49a263fe57b 100644
--- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c
+++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/amdgpu_dcn_calcs.c
@@ -626,7 +626,7 @@ static void calc_wm_sets_and_perf_params(
 
 static bool dcn_bw_apply_registry_override(struct dc *dc)
 {
-	bool updated = false;
+	volatile bool updated = false;
 
 	DC_FP_START();
 	if ((int)(dc->dcn_soc->sr_exit_time * 1000) != dc->debug.sr_exit_time_ns
@@ -733,7 +733,7 @@ bool dcn_validate_bandwidth(
 	struct dcn_bw_internal_vars *v = &context->dcn_bw_vars;
 	int i, input_idx, k;
 	int vesa_sync_start, asic_blank_end, asic_blank_start;
-	bool bw_limit_pass;
+	volatile bool bw_limit_pass;
 	float bw_limit;
 
 	PERFORMANCE_TRACE_START();
@@ -1502,7 +1502,7 @@ void dcn_bw_notify_pplib_of_wm_ranges(struct dc *dc)
 {
 	struct pp_smu_funcs_rv *pp = NULL;
 	struct pp_smu_wm_range_sets ranges = {0};
-	int min_fclk_khz, min_dcfclk_khz, socclk_khz;
+	volatile int min_fclk_khz, min_dcfclk_khz, socclk_khz;
 	const int overdrive = 5000000; /* 5 GHz to cover Overdrive */
 
 	if (dc->res_pool->pp_smu)
diff --git a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/amdgpu_dcn20_resource.c b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/amdgpu_dcn20_resource.c
index 24a02d9a2c2f..51074ed75e9f 100644
--- a/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/amdgpu_dcn20_resource.c
+++ b/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/amdgpu_dcn20_resource.c
@@ -2932,7 +2932,7 @@ validate_out:
 bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
 		bool fast_validate)
 {
-	bool voltage_supported = false;
+	volatile bool voltage_supported = false;
 	bool full_pstate_supported = false;
 	bool dummy_pstate_supported = false;
 	double p_state_latency_us;