port-mmeye/57627: mmeye locore.S assembler code fails to build when ROMIMAGE is defined

[vezhlys%gmail.com@localhost]

>Number:         57627
>Category:       port-mmeye
>Synopsis:       mmeye locore.S assembler code fails to build when ROMIMAGE is defined
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    port-mmeye-maintainer
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Sun Sep 24 14:35:00 +0000 2023
>Originator:     Andrius V
>Release:        10.99.9
>Organization:
>Environment:
NetBSD 10.0_BETA amd64 x86_64
>Description:
mmeye has a MMTAROMNEW kernel config with ROMIMAGE option enabled by default. This option has specific code defined in mmeye/locore.S file, however, currently it fails to build with the errors below:

--- locore.o ---
/home/andriusv/netbsd-src-cvs/src/sys/arch/mmeye/mmeye/locore.S: Assembler messages:
/home/andriusv/netbsd-src-cvs/src/sys/arch/mmeye/mmeye/locore.S:122: Error: pcrel too far
/home/andriusv/netbsd-src-cvs/src/sys/arch/mmeye/mmeye/locore.S:143: Error: pcrel too far

Both failing lines are virtually the same:
mov.l	_C_LABEL(ram_start), r4

I looked around and evbsh3 locore.S has very similar code under the same option. In fact, applying the difference actually makes the code build (see patch below). However, I have quite poor understanding what the code does and if the changes would not change the functionality. Thus, I need some SH4 assembly guru to take a look.

Regards,
Andrius V
>How-To-Repeat:
Try to build mmeye MMTAROMNEW rev 1.57 kernel, observe build failures.
>Fix:
--- sys/arch/mmeye/mmeye/locore.S	2023-09-24 16:48:07.364356199 +0300
+++ sys/arch/mmeye/mmeye/locore.S.updated	2023-09-24 16:47:59.696094820 +0300
@@ -119,7 +119,8 @@ start1:
 #ifdef ROMIMAGE
 	/* Initialize BUS State Control Regs. */
 	mov.l	_ROM_START, r3
-	mov.l	_C_LABEL(ram_start), r4
+	mov.l	XL_ram_start, r4
+	mov.l	@r4, r4
 	sub	r3, r4
 	/* Set Bus State Controller */
 	mov.l	XLInitializeBsc, r0
@@ -140,7 +141,8 @@ start1:
 	add	r3, r1		/* src address */
 	mov.l	___start, r3
 	sub	r2, r3
-	mov.l	_C_LABEL(ram_start), r4
+	mov.l	XL_ram_start, r4
+	mov.l	@r4, r4
 	add	r4, r3		/* dest address */
 1:
 	mov.l	@r1+, r4
@@ -157,6 +159,8 @@ start1:
 	.align	2
 LXstart_in_RAM:
 	.long	start_in_RAM
+XL_ram_start:
+	.long	_C_LABEL(ram_start)
 #else /* ROMIMAGE */
 	/* Set Bus State Controller */
 	mov.l	XLInitializeBsc, r0