Re: port-amd64/58410: x86_patch() panic with core ultra processor

[Patrick Welche <prlw1%welche.eu@localhost>]

The following reply was made to PR port-amd64/58410; it has been noted by GNATS.

From: Patrick Welche <prlw1%welche.eu@localhost>
To: gnats-bugs%netbsd.org@localhost
Cc: 
Subject: Re: port-amd64/58410: x86_patch() panic with core ultra processor
Date: Mon, 5 Aug 2024 20:09:05 +0100

 Mystery over: it seems things go wrong with the first cpu to be configured
 is not the boot cpu.
 
 cpunum = 32 returned from lapic is presumably the boot cpu.
 
 When booting in single processor mode (-1), cpu4 is the one which is
 configured, which makes sense:
 
 >          ACPI CPU= 8   APIC ID=16
 >          ACPI CPU= 9   APIC ID=17
 >          ACPI CPU=10   APIC ID=24
 >          ACPI CPU=11   APIC ID=25
 >          ACPI CPU=12   APIC ID=32  <- cpu4
 >          ACPI CPU=13   APIC ID=33
 >          ACPI CPU=14   APIC ID=40
 >          ACPI CPU=15   APIC ID=41
 >          ACPI CPU=16   APIC ID=48
 >          ACPI CPU=17   APIC ID=49
 >          ACPI CPU=18   APIC ID=56
 >          ACPI CPU=19   APIC ID=57
 >          ACPI CPU= 0   APIC ID= 0
 >          ACPI CPU= 1   APIC ID= 2
 >          ACPI CPU= 2   APIC ID= 4
 >          ACPI CPU= 3   APIC ID= 6
 >          ACPI CPU= 4   APIC ID= 8
 >          ACPI CPU= 5   APIC ID=10
 >          ACPI CPU= 6   APIC ID=12
 >          ACPI CPU= 7   APIC ID=14
 >          ACPI CPU=20   APIC ID=64
 >          ACPI CPU=21   APIC ID=66
 
 This trivial patch bears out the theory:
 
 Index: cpu.c
 ===================================================================
 RCS file: /cvsroot/src/sys/arch/x86/x86/cpu.c,v
 retrieving revision 1.210
 diff -u -r1.210 cpu.c
 --- cpu.c       22 Apr 2024 23:07:47 -0000      1.210
 +++ cpu.c       5 Aug 2024 19:08:18 -0000
 @@ -337,6 +337,7 @@
  #endif
  }
  
 +static int xxxpw = 0;
  static void
  cpu_attach(device_t parent, device_t self, void *aux)
  {
 @@ -365,6 +366,8 @@
          * structure, otherwise use the primary's.
          */
         if (caa->cpu_role == CPU_ROLE_AP) {
 +               if (xxxpw == 0)
 +                       return;
                 if ((boothowto & RB_MD1) != 0) {
                         aprint_error(": multiprocessor boot disabled\n");
                         if (!pmf_device_register(self, NULL, NULL))
 @@ -379,6 +382,7 @@
                 ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE);
                 ci->ci_curldt = -1;
         } else {
 +       xxxpw = 1;
                 aprint_naive(": %s Processor\n",
                     caa->cpu_role == CPU_ROLE_SP ? "Single" : "Boot");
                 ci = &cpu_info_primary;
 
 
 
 and cpu4 and all following come up, so I have 18 out of 22 cpus configured.