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qemu-nvmm: misc
Module Name: pkgsrc-wip
Committed By: Maxime Villard <max%m00nbsd.net@localhost>
Pushed By: maxv
Date: Sun Apr 7 16:52:24 2019 +0200
Changeset: be7441acd957d89a40976d4b3d62a5427cbba69e
Modified Files:
qemu-nvmm/distinfo
qemu-nvmm/patches/patch-nvmm-support
Log Message:
qemu-nvmm: misc
Remove useless CPUID filtering, keep only MCE/MCA/MTRR for now. Also print
hex, because exit reasons are hexadecimal.
To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=be7441acd957d89a40976d4b3d62a5427cbba69e
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
diffstat:
qemu-nvmm/distinfo | 2 +-
qemu-nvmm/patches/patch-nvmm-support | 19 +++----------------
2 files changed, 4 insertions(+), 17 deletions(-)
diffs:
diff --git a/qemu-nvmm/distinfo b/qemu-nvmm/distinfo
index 526778f9f6..3dbe149419 100644
--- a/qemu-nvmm/distinfo
+++ b/qemu-nvmm/distinfo
@@ -16,7 +16,7 @@ SHA1 (patch-hw_display_omap__dss.c) = 6b13242f28e32346bc70548c216c578d98fd3420
SHA1 (patch-hw_net_etraxfs__eth.c) = e5dd1661d60dbcd27b332403e0843500ba9544bc
SHA1 (patch-hw_net_xilinx__axienet.c) = ebcd2676d64ce6f31e4a8c976d4fdf530ad5e8b7
SHA1 (patch-hw_usb_dev-mtp.c) = 66543b5559d92f8e2fa9a6eb85e5dfe7c1ad3339
-SHA1 (patch-nvmm-support) = e563de960d598dde0dc505a9135006b263857155
+SHA1 (patch-nvmm-support) = 9870f2636ae7d817bc148caf8a912fe6c5cdbe0a
SHA1 (patch-target_arm_cpu.h) = 0f70a35900c7cc3124dc11969643e0eef6ad6af5
SHA1 (patch-target_arm_helper.c) = 08f9425422080442a2c90bb252423bab38651ae4
SHA1 (patch-tests_Makefile.include) = 42345d697cb2e324dccf1d68bd8d61e8001c6162
diff --git a/qemu-nvmm/patches/patch-nvmm-support b/qemu-nvmm/patches/patch-nvmm-support
index 9574574d7d..ed91fce120 100644
--- a/qemu-nvmm/patches/patch-nvmm-support
+++ b/qemu-nvmm/patches/patch-nvmm-support
@@ -376,8 +376,8 @@ Add NVMM support.
obj-$(CONFIG_SEV) += sev.o
obj-$(call lnot,$(CONFIG_SEV)) += sev-stub.o
--- target/i386/nvmm-all.c 1970-01-01 01:00:00.000000000 +0100
-+++ target/i386/nvmm-all.c 2019-04-06 13:33:27.806991190 +0200
-@@ -0,0 +1,1178 @@
++++ target/i386/nvmm-all.c 2019-04-07 16:34:47.074878682 +0200
+@@ -0,0 +1,1165 @@
+/*
+ * Copyright (c) 2018-2019 Maxime Villard, All rights reserved.
+ *
@@ -1132,9 +1132,8 @@ Add NVMM support.
+ cpu->exception_index = EXCP_INTERRUPT;
+ ret = 1;
+ break;
-+
+ default:
-+ error_report("NVMM: Unexpected VM exit code %lu",
++ error_report("NVMM: Unexpected VM exit code %lx",
+ exit.reason);
+ nvmm_get_registers(cpu);
+ qemu_mutex_lock_iothread();
@@ -1461,21 +1460,9 @@ Add NVMM support.
+ struct nvmm_x86_conf_cpuid cpuid;
+ int ret;
+
-+ /* Delete the Monitor and MTRR bits, set the Hypervisor bit. */
+ memset(&cpuid, 0, sizeof(cpuid));
+ cpuid.leaf = 0x00000001;
-+ cpuid.del.ecx = CPUID_EXT_MONITOR | CPUID_EXT_X2APIC;
+ cpuid.del.edx = CPUID_MCE | CPUID_MCA | CPUID_MTRR;
-+ cpuid.set.ecx = CPUID_EXT_HYPERVISOR;
-+
-+ ret = nvmm_machine_configure(mach, NVMM_X86_CONF_CPUID, &cpuid);
-+ if (ret == -1)
-+ return -1;
-+
-+ /* Delete the OSVW bit. */
-+ memset(&cpuid, 0, sizeof(cpuid));
-+ cpuid.leaf = 0x80000001;
-+ cpuid.del.ecx = CPUID_EXT3_OSVW;
+
+ ret = nvmm_machine_configure(mach, NVMM_X86_CONF_CPUID, &cpuid);
+ if (ret == -1)
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