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llvm: enable new architectures



Module Name:	pkgsrc-wip
Committed By:	Adam Ciarciński <aciarcinski%teonite.com@localhost>
Pushed By:	adam
Date:		Fri May 10 12:48:07 2024 +0200
Changeset:	319f9cfef4ce1ca5b736f5b6f3ca4524c1463185

Modified Files:
	llvm/PLIST
	llvm/options.mk

Log Message:
llvm: enable new architectures

To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=319f9cfef4ce1ca5b736f5b6f3ca4524c1463185

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

diffstat:
 llvm/PLIST      | 18 ++++++++++++++++++
 llvm/options.mk |  4 ++--
 2 files changed, 20 insertions(+), 2 deletions(-)

diffs:
diff --git a/llvm/PLIST b/llvm/PLIST
index a634295774..89a9ad67df 100644
--- a/llvm/PLIST
+++ b/llvm/PLIST
@@ -2121,6 +2121,7 @@ lib/libLLVMDWARFLinker.a
 lib/libLLVMDWARFLinkerClassic.a
 lib/libLLVMDWARFLinkerParallel.a
 lib/libLLVMDWP.a
+${PLIST.DirectX}lib/libLLVMDXILBitWriter.a
 lib/libLLVMDebugInfoBTF.a
 lib/libLLVMDebugInfoCodeView.a
 lib/libLLVMDebugInfoDWARF.a
@@ -2131,6 +2132,10 @@ lib/libLLVMDebugInfoPDB.a
 lib/libLLVMDebuginfod.a
 lib/libLLVMDemangle.a
 lib/libLLVMDiff.a
+${PLIST.DirectX}lib/libLLVMDirectXCodeGen.a
+${PLIST.DirectX}lib/libLLVMDirectXDesc.a
+${PLIST.DirectX}lib/libLLVMDirectXInfo.a
+${PLIST.DirectX}lib/libLLVMDirectXPointerTypeAnalysis.a
 lib/libLLVMDlltoolDriver.a
 lib/libLLVMExecutionEngine.a
 lib/libLLVMExegesis.a
@@ -2170,6 +2175,11 @@ ${PLIST.Lanai}lib/libLLVMLanaiInfo.a
 lib/libLLVMLibDriver.a
 lib/libLLVMLineEditor.a
 lib/libLLVMLinker.a
+${PLIST.LoongArch}lib/libLLVMLoongArchAsmParser.a
+${PLIST.LoongArch}lib/libLLVMLoongArchCodeGen.a
+${PLIST.LoongArch}lib/libLLVMLoongArchDesc.a
+${PLIST.LoongArch}lib/libLLVMLoongArchDisassembler.a
+${PLIST.LoongArch}lib/libLLVMLoongArchInfo.a
 ${PLIST.M68k}lib/libLLVMM68kAsmParser.a
 ${PLIST.M68k}lib/libLLVMM68kCodeGen.a
 ${PLIST.M68k}lib/libLLVMM68kDesc.a
@@ -2218,6 +2228,9 @@ ${PLIST.RISCV}lib/libLLVMRISCVInfo.a
 ${PLIST.RISCV}lib/libLLVMRISCVTargetMCA.a
 lib/libLLVMRemarks.a
 lib/libLLVMRuntimeDyld.a
+${PLIST.SPIRV}lib/libLLVMSPIRVCodeGen.a
+${PLIST.SPIRV}lib/libLLVMSPIRVDesc.a
+${PLIST.SPIRV}lib/libLLVMSPIRVInfo.a
 lib/libLLVMScalarOpts.a
 lib/libLLVMSelectionDAG.a
 ${PLIST.Sparc}lib/libLLVMSparcAsmParser.a
@@ -2265,6 +2278,11 @@ ${PLIST.XCore}lib/libLLVMXCoreDesc.a
 ${PLIST.XCore}lib/libLLVMXCoreDisassembler.a
 ${PLIST.XCore}lib/libLLVMXCoreInfo.a
 lib/libLLVMXRay.a
+${PLIST.Xtensa}lib/libLLVMXtensaAsmParser.a
+${PLIST.Xtensa}lib/libLLVMXtensaCodeGen.a
+${PLIST.Xtensa}lib/libLLVMXtensaDesc.a
+${PLIST.Xtensa}lib/libLLVMXtensaDisassembler.a
+${PLIST.Xtensa}lib/libLLVMXtensaInfo.a
 lib/libLLVMipo.a
 lib/libLTO.${SOEXT}
 ${PLIST.notdylib}lib/libLTO.${SOEXT}.${LLVM_MAJOR_VERSION}
diff --git a/llvm/options.mk b/llvm/options.mk
index 5b11f73753..afea46dc17 100644
--- a/llvm/options.mk
+++ b/llvm/options.mk
@@ -2,8 +2,8 @@
 
 PKG_OPTIONS_VAR=	PKG_OPTIONS.llvm
 
-LLVM_TARGETS=	AArch64 AMDGPU ARM AVR BPF Hexagon Lanai Mips MSP430 NVPTX PowerPC RISCV Sparc SystemZ WebAssembly X86 XCore
-LLVM_EXPERIMENTAL_TARGETS=	ARC CSKY M68k VE
+LLVM_TARGETS=	AArch64 AMDGPU ARM AVR BPF Hexagon Lanai LoongArch Mips MSP430 NVPTX PowerPC RISCV Sparc SystemZ VE WebAssembly X86 XCore
+LLVM_EXPERIMENTAL_TARGETS=	ARC CSKY DirectX M68k SPIRV Xtensa
 
 .for tgt in ${LLVM_TARGETS} ${LLVM_EXPERIMENTAL_TARGETS}
 PLIST_VARS+=			${tgt}


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