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rust180: make big-endian aarch64 build again.
Module Name: pkgsrc-wip
Committed By: Havard Eidnes <he%NetBSD.org@localhost>
Pushed By: he
Date: Sun Sep 1 21:15:30 2024 +0000
Changeset: 8a356e075e9d6c8a2dc1c12cf12d535150f0bce9
Modified Files:
rust180/Makefile
rust180/distinfo
rust180/do-cross.mk
Added Files:
rust180/patches/patch-tools_rust-analyzer_lib_line-index-src_lib.rs
rust180/patches/patch-vendor_bytecount-0.6.8_src_lib.rs
rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_memchr.rs
rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_mod.rs
rust180/patches/patch-vendor_memchr-2.7.2_src_memchr.rs
rust180/patches/patch-vendor_memchr-2.7.2_src_memmem_searcher.rs
rust180/patches/patch-vendor_memchr-2.7.2_src_vector.rs
rust180/patches/patch-vendor_zerocopy-0.7.32_src_lib.rs
rust180/patches/patch-vendor_zerocopy-0.7.34_src_lib.rs
Log Message:
rust180: make big-endian aarch64 build again.
This is done by conditionalizing use of the neon SIMD
extensions on the target being little-endian.
Ref. https://github.com/rust-lang/rust/issues/129819
To see a diff of this commit:
https://wip.pkgsrc.org/cgi-bin/gitweb.cgi?p=pkgsrc-wip.git;a=commitdiff;h=8a356e075e9d6c8a2dc1c12cf12d535150f0bce9
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
diffstat:
rust180/Makefile | 24 ++++
rust180/distinfo | 9 ++
rust180/do-cross.mk | 4 +-
...h-tools_rust-analyzer_lib_line-index-src_lib.rs | 47 ++++++++
.../patch-vendor_bytecount-0.6.8_src_lib.rs | 45 +++++++
...-vendor_memchr-2.7.2_src_arch_aarch64_memchr.rs | 25 ++++
...tch-vendor_memchr-2.7.2_src_arch_aarch64_mod.rs | 16 +++
.../patch-vendor_memchr-2.7.2_src_memchr.rs | 129 +++++++++++++++++++++
...atch-vendor_memchr-2.7.2_src_memmem_searcher.rs | 79 +++++++++++++
.../patch-vendor_memchr-2.7.2_src_vector.rs | 15 +++
.../patch-vendor_zerocopy-0.7.32_src_lib.rs | 25 ++++
.../patch-vendor_zerocopy-0.7.34_src_lib.rs | 25 ++++
12 files changed, 441 insertions(+), 2 deletions(-)
diffs:
diff --git a/rust180/Makefile b/rust180/Makefile
index fdd9e9f9cc..05f3e3f92a 100644
--- a/rust180/Makefile
+++ b/rust180/Makefile
@@ -435,6 +435,30 @@ CKSUM_CRATES+= vendor/libc-0.2.154
CKSUMS+= 3e550d95419169febf094c425451ca86b12821fa17839b4b0ba7520b145a5820
CKSUMS+= 1cf38d9ddeca5295821b4234e17e1fc749f35b00307bdfdacb24c6892a288ad6
+CKSUM_CRATES+= vendor/zerocopy-0.7.32
+CKSUMS+= 2f21f18a4ca1d4be2d997f037158cb21a7421b2ba2cc52f3e4c5f9410197ed27
+CKSUMS+= abe079743c2b2dea5b2c42564f98741a5eb9e24ff019e01742ace5581e53c06f
+
+CKSUM_CRATES+= vendor/zerocopy-0.7.34
+CKSUMS+= c225b0b65ab955600b065a30f9d744ebb7754dff5a6e7c299464c5d1aba92ae7
+CKSUMS+= c5da1cf7c0164039919074a72095090505bd9b68c2ed9d1ab5838061fef2999d
+
+CKSUM_CRATES+= vendor/memchr-2.7.2
+CKSUMS+= 24e8620d52da38b051c446864089cdfaba6fa3afc27e16a716aa36a716f6636f
+CKSUMS+= 1417d51a84f08d50e97f9f0870c485cf129ae66e3cfdf5bdd9908b243ace1319
+CKSUMS+= 5bb70f915084e629d940dbc322f5b9096b2e658cf63fea8a2f6e7550412e73a0
+CKSUMS+= 34aaa34eb7048e8bba49d390942ab707990380952f37f388f3cca30970c53450
+CKSUMS+= 44cd1a614bd66f1e66fc86c541d3c3b8d3a14a644c13e8bf816df3f555eac2d4
+CKSUMS+= 27f9bff08b24828e1a611b10a0282f5457d12e9e7254202040144d392297d720
+CKSUMS+= 7763472d43c66df596ca0697c07db0b4666d38a6a14f64f9f298aaf756c4a715
+CKSUMS+= 1b26fca824c410077780fbc2f4c53c1d195ba3bdf6785b529ceb0a11f039cec2
+CKSUMS+= 6ae779ec5d00f443075316e0105edf30b489a38e2e96325bec14ccecd014145b
+CKSUMS+= 28d66e566b73f6f0f7add4092874dc967ce133bfb6dcbd81f03c9a04b6e4e1d0
+
+CKSUM_CRATES+= vendor/bytecount-0.6.8
+CKSUMS+= 01cd755a128d8a5892f3edda195b26bb461be375be17dd72e6e4f061169e6dff
+CKSUMS+= a6750c0e2a6c385ec902cd7f87de7835fe2b4171b9c83da64122274ee20a77c6
+
SUBST_CLASSES+= cksum
SUBST_STAGE.cksum= pre-configure
.for crate in ${CKSUM_CRATES}
diff --git a/rust180/distinfo b/rust180/distinfo
index f3b9211e58..cd94c02832 100644
--- a/rust180/distinfo
+++ b/rust180/distinfo
@@ -133,6 +133,8 @@ SHA1 (patch-src_llvm-project_llvm_utils_FileCheck_FileCheck.cpp) = 2587c2f4d11ad
SHA1 (patch-src_tools_cargo_src_cargo_core_profiles.rs) = e1af7fde97416e0a269ee34efd37f4f47fcf7a95
SHA1 (patch-src_tools_cargo_tests_testsuite_build.rs) = 60713699c968f3e389f486e796009d31a5048906
SHA1 (patch-src_tools_rust-installer_install-template.sh) = 6984546c34a2e4d55a6dbe59baa0d4958184e0b7
+SHA1 (patch-tools_rust-analyzer_lib_line-index-src_lib.rs) = 4ed527174447ee23fa81dd6840e18b9949d5a273
+SHA1 (patch-vendor_bytecount-0.6.8_src_lib.rs) = d7610f2ae957d085a465f8c75549e5a11586a8b0
SHA1 (patch-vendor_cc-1.0.73_src_lib.rs) = 690b3feaa619050512254d7c18fd4f51da98e279
SHA1 (patch-vendor_crossbeam-utils-0.8.18_no__atomic.rs) = d4d9288cb199af9bc7e321fbd2b42860aed954ec
SHA1 (patch-vendor_libc-0.2.148_src_unix_bsd_netbsdlike_netbsd_mips.rs) = 0895df54084281263b9dae67e57f68168fb66bd4
@@ -140,6 +142,11 @@ SHA1 (patch-vendor_libc-0.2.148_src_unix_bsd_netbsdlike_netbsd_riscv64.rs) = 869
SHA1 (patch-vendor_libc-0.2.153_src_unix_solarish_mod.rs) = dfa5ec7f1c69e3ca4ff8574dcd248bdce6c82f0b
SHA1 (patch-vendor_libc-0.2.154_src_unix_solarish_mod.rs) = e8f72fb13df8b9e111d296bcf3597343496219b5
SHA1 (patch-vendor_libc-0.2.155_src_unix_solarish_mod.rs) = 97505b88875aa80fa2b5589b6090237c3786e143
+SHA1 (patch-vendor_memchr-2.7.2_src_arch_aarch64_memchr.rs) = caf5b8b848923c2e74bf5b5742b1ee564b6145f1
+SHA1 (patch-vendor_memchr-2.7.2_src_arch_aarch64_mod.rs) = fa96a8e6546e5603a8a22fe6e09619ffaafe7bf3
+SHA1 (patch-vendor_memchr-2.7.2_src_memchr.rs) = 609dc522e5c774226d7b21391d5354f8382fe578
+SHA1 (patch-vendor_memchr-2.7.2_src_memmem_searcher.rs) = 0bdafac65abac9ee719c64d2c53125edbb5edd20
+SHA1 (patch-vendor_memchr-2.7.2_src_vector.rs) = eb716f077a311fb347139b0e40237f3ed31cf2d8
SHA1 (patch-vendor_openssl-src-111.28.2+1.1.1w_openssl_Configurations_10-main.conf) = ac2963bca8d1dc4e196693d9f5a264f38355314a
SHA1 (patch-vendor_openssl-src-111.28.2+1.1.1w_src_lib.rs) = c87435bef2899b30b5cdb1b525193489988b2476
SHA1 (patch-vendor_openssl-sys-0.9.102_build_find__normal.rs) = 2cf1432ed2be79677d41f267f9a08ff3082e9cbc
@@ -147,3 +154,5 @@ SHA1 (patch-vendor_openssl-sys-0.9.102_build_main.rs) = 8861b7d3acc1643f7fe6f494
SHA1 (patch-vendor_openssl-sys-0.9.92_build_find__normal.rs) = 91ad0d3e78055a5a205d55cd2c260cde70233bfe
SHA1 (patch-vendor_openssl-sys-0.9.92_build_main.rs) = a47c0b7144466592aca3b622cb77498d59c5dfc4
SHA1 (patch-vendor_rustc-ap-rustc__target_src_spec_aarch64__be__unknown__netbsd.rs) = 4e86aec4c89db9a331950a12f8ec7b8aaa50eed7
+SHA1 (patch-vendor_zerocopy-0.7.32_src_lib.rs) = d683e48900f427327f4ed518fe62b593e82c13d7
+SHA1 (patch-vendor_zerocopy-0.7.34_src_lib.rs) = 411cbf6fe2f2c8773d13e8fcc6e101b6b53109a7
diff --git a/rust180/do-cross.mk b/rust180/do-cross.mk
index 8c7070433d..36d5cd1a7f 100644
--- a/rust180/do-cross.mk
+++ b/rust180/do-cross.mk
@@ -10,10 +10,10 @@ SHORT_TARGETS+= armv6
SHORT_TARGETS+= sparc64
SHORT_TARGETS+= powerpc
SHORT_TARGETS+= arm64
-#SHORT_TARGETS+= arm64_be
+SHORT_TARGETS+= arm64_be
SHORT_TARGETS+= i386
SHORT_TARGETS+= riscv64
-SHORT_TARGETS+= mipsel # produces mips32 (not mips1) executables
+SHORT_TARGETS+= mipsel # produces mips32 (not mips1) executables
# Conditional local overrides of ROOT.* variables:
.sinclude "local-roots.mk"
diff --git a/rust180/patches/patch-tools_rust-analyzer_lib_line-index-src_lib.rs b/rust180/patches/patch-tools_rust-analyzer_lib_line-index-src_lib.rs
new file mode 100644
index 0000000000..8b4f9fe0d2
--- /dev/null
+++ b/rust180/patches/patch-tools_rust-analyzer_lib_line-index-src_lib.rs
@@ -0,0 +1,47 @@
+$NetBSD$
+
+Try to avoid using neon for big-endian aarch64.
+Ref. https://github.com/rust-lang/rust/issues/129819
+
+--- src/tools/rust-analyzer/lib/line-index/src/lib.rs.orig 2024-09-01 14:12:57.016998002 +0000
++++ src/tools/rust-analyzer/lib/line-index/src/lib.rs
+@@ -227,7 +227,7 @@ fn analyze_source_file_dispatch(
+ }
+ }
+
+-#[cfg(target_arch = "aarch64")]
++#[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ fn analyze_source_file_dispatch(
+ src: &str,
+ lines: &mut Vec<TextSize>,
+@@ -339,7 +339,7 @@ unsafe fn analyze_source_file_sse2(
+ }
+
+ #[target_feature(enable = "neon")]
+-#[cfg(target_arch = "aarch64")]
++#[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ #[inline]
+ // See https://community.arm.com/arm-community-blogs/b/infrastructure-solutions-blog/posts/porting-x86-vector-bitmask-optimizations-to-arm-neon
+ //
+@@ -354,7 +354,7 @@ unsafe fn move_mask(v: std::arch::aarch6
+ }
+
+ #[target_feature(enable = "neon")]
+-#[cfg(target_arch = "aarch64")]
++#[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ unsafe fn analyze_source_file_neon(
+ src: &str,
+ lines: &mut Vec<TextSize>,
+@@ -433,7 +433,11 @@ unsafe fn analyze_source_file_neon(
+ }
+ }
+
+-#[cfg(not(any(target_arch = "x86", target_arch = "x86_64", target_arch = "aarch64")))]
++#[cfg(not(any(
++ target_arch = "x86",
++ target_arch = "x86_64",
++ all(target_arch = "aarch64", target_endian = "little")
++)))]
+ // The target (or compiler version) does not support SSE2 ...
+ fn analyze_source_file_dispatch(
+ src: &str,
diff --git a/rust180/patches/patch-vendor_bytecount-0.6.8_src_lib.rs b/rust180/patches/patch-vendor_bytecount-0.6.8_src_lib.rs
new file mode 100644
index 0000000000..8726eb0b2e
--- /dev/null
+++ b/rust180/patches/patch-vendor_bytecount-0.6.8_src_lib.rs
@@ -0,0 +1,45 @@
+$NetBSD$
+
+Avoid using neon on big-endian aarch64.
+Ref. https://github.com/rust-lang/rust/issues/129819
+
+--- vendor/bytecount-0.6.8/src/lib.rs.orig 2024-09-01 16:29:37.478735730 +0000
++++ vendor/bytecount-0.6.8/src/lib.rs
+@@ -50,7 +50,10 @@ mod integer_simd;
+ feature = "runtime-dispatch-simd",
+ any(target_arch = "x86", target_arch = "x86_64")
+ ),
+- target_arch = "aarch64",
++ all(
++ target_arch = "aarch64",
++ target_endian = "little"
++ ),
+ target_arch = "wasm32",
+ feature = "generic-simd"
+ ))]
+@@ -93,7 +96,11 @@ pub fn count(haystack: &[u8], needle: u8
+ }
+ }
+ }
+- #[cfg(all(target_arch = "aarch64", not(feature = "generic_simd")))]
++ #[cfg(all(
++ target_arch = "aarch64",
++ target_endian = "little",
++ not(feature = "generic_simd")
++ ))]
+ {
+ unsafe {
+ return simd::aarch64::chunk_count(haystack, needle);
+@@ -155,7 +162,11 @@ pub fn num_chars(utf8_chars: &[u8]) -> u
+ }
+ }
+ }
+- #[cfg(all(target_arch = "aarch64", not(feature = "generic_simd")))]
++ #[cfg(all(
++ target_arch = "aarch64",
++ target_endian = "little",
++ not(feature = "generic_simd")
++ ))]
+ {
+ unsafe {
+ return simd::aarch64::chunk_num_chars(utf8_chars);
diff --git a/rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_memchr.rs b/rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_memchr.rs
new file mode 100644
index 0000000000..12d39afeff
--- /dev/null
+++ b/rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_memchr.rs
@@ -0,0 +1,25 @@
+$NetBSD$
+
+Turn off use of neon on big-endian aarch64.
+Ref. https://github.com/rust-lang/rust/issues/129819
+
+--- vendor/memchr-2.7.2/src/arch/aarch64/memchr.rs.orig 2024-08-31 22:23:54.486083582 +0000
++++ vendor/memchr-2.7.2/src/arch/aarch64/memchr.rs
+@@ -8,7 +8,7 @@ available for `aarch64` targets.)
+
+ macro_rules! defraw {
+ ($ty:ident, $find:ident, $start:ident, $end:ident, $($needles:ident),+) => {{
+- #[cfg(target_feature = "neon")]
++ #[cfg(all(target_feature = "neon", target_endian = "little"))]
+ {
+ use crate::arch::aarch64::neon::memchr::$ty;
+
+@@ -19,7 +19,7 @@ macro_rules! defraw {
+ // enabled.
+ $ty::new_unchecked($($needles),+).$find($start, $end)
+ }
+- #[cfg(not(target_feature = "neon"))]
++ #[cfg(not(all(target_feature = "neon", target_endian = "little")))]
+ {
+ use crate::arch::all::memchr::$ty;
+
diff --git a/rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_mod.rs b/rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_mod.rs
new file mode 100644
index 0000000000..f2d0c13101
--- /dev/null
+++ b/rust180/patches/patch-vendor_memchr-2.7.2_src_arch_aarch64_mod.rs
@@ -0,0 +1,16 @@
+$NetBSD$
+
+Only use neon extension on little-endian aarch64.
+Ref. https://github.com/rust-lang/rust/issues/129819
+
+--- vendor/memchr-2.7.2/src/arch/aarch64/mod.rs.orig 2024-09-01 09:05:35.656376678 +0000
++++ vendor/memchr-2.7.2/src/arch/aarch64/mod.rs
+@@ -2,6 +2,8 @@
+ Vector algorithms for the `aarch64` target.
+ */
+
++#[cfg(target_endian = "little")]
+ pub mod neon;
+
++#[cfg(target_endian = "little")]
+ pub(crate) mod memchr;
diff --git a/rust180/patches/patch-vendor_memchr-2.7.2_src_memchr.rs b/rust180/patches/patch-vendor_memchr-2.7.2_src_memchr.rs
new file mode 100644
index 0000000000..9bdf5fd6f4
--- /dev/null
+++ b/rust180/patches/patch-vendor_memchr-2.7.2_src_memchr.rs
@@ -0,0 +1,129 @@
+$NetBSD$
+
+Only use neon on aarch64 in little-endian mode.
+Ref. https://github.com/rust-lang/rust/issues/129819
+
+--- vendor/memchr-2.7.2/src/memchr.rs.orig 2024-09-01 11:31:02.127419756 +0000
++++ vendor/memchr-2.7.2/src/memchr.rs
+@@ -518,14 +518,14 @@ unsafe fn memchr_raw(
+ {
+ crate::arch::wasm32::memchr::memchr_raw(needle, start, end)
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ crate::arch::aarch64::memchr::memchr_raw(needle, start, end)
+ }
+ #[cfg(not(any(
+ target_arch = "x86_64",
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ crate::arch::all::memchr::One::new(needle).find_raw(start, end)
+@@ -551,14 +551,14 @@ unsafe fn memrchr_raw(
+ {
+ crate::arch::wasm32::memchr::memrchr_raw(needle, start, end)
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ crate::arch::aarch64::memchr::memrchr_raw(needle, start, end)
+ }
+ #[cfg(not(any(
+ target_arch = "x86_64",
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ crate::arch::all::memchr::One::new(needle).rfind_raw(start, end)
+@@ -585,14 +585,14 @@ unsafe fn memchr2_raw(
+ {
+ crate::arch::wasm32::memchr::memchr2_raw(needle1, needle2, start, end)
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ crate::arch::aarch64::memchr::memchr2_raw(needle1, needle2, start, end)
+ }
+ #[cfg(not(any(
+ target_arch = "x86_64",
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ crate::arch::all::memchr::Two::new(needle1, needle2)
+@@ -620,7 +620,7 @@ unsafe fn memrchr2_raw(
+ {
+ crate::arch::wasm32::memchr::memrchr2_raw(needle1, needle2, start, end)
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ crate::arch::aarch64::memchr::memrchr2_raw(
+ needle1, needle2, start, end,
+@@ -629,7 +629,7 @@ unsafe fn memrchr2_raw(
+ #[cfg(not(any(
+ target_arch = "x86_64",
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ crate::arch::all::memchr::Two::new(needle1, needle2)
+@@ -662,7 +662,7 @@ unsafe fn memchr3_raw(
+ needle1, needle2, needle3, start, end,
+ )
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ crate::arch::aarch64::memchr::memchr3_raw(
+ needle1, needle2, needle3, start, end,
+@@ -671,7 +671,7 @@ unsafe fn memchr3_raw(
+ #[cfg(not(any(
+ target_arch = "x86_64",
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ crate::arch::all::memchr::Three::new(needle1, needle2, needle3)
+@@ -704,7 +704,7 @@ unsafe fn memrchr3_raw(
+ needle1, needle2, needle3, start, end,
+ )
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ crate::arch::aarch64::memchr::memrchr3_raw(
+ needle1, needle2, needle3, start, end,
+@@ -713,7 +713,7 @@ unsafe fn memrchr3_raw(
+ #[cfg(not(any(
+ target_arch = "x86_64",
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ crate::arch::all::memchr::Three::new(needle1, needle2, needle3)
+@@ -736,14 +736,14 @@ unsafe fn count_raw(needle: u8, start: *
+ {
+ crate::arch::wasm32::memchr::count_raw(needle, start, end)
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ crate::arch::aarch64::memchr::count_raw(needle, start, end)
+ }
+ #[cfg(not(any(
+ target_arch = "x86_64",
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ crate::arch::all::memchr::One::new(needle).count_raw(start, end)
diff --git a/rust180/patches/patch-vendor_memchr-2.7.2_src_memmem_searcher.rs b/rust180/patches/patch-vendor_memchr-2.7.2_src_memmem_searcher.rs
new file mode 100644
index 0000000000..6475e7dfaa
--- /dev/null
+++ b/rust180/patches/patch-vendor_memchr-2.7.2_src_memmem_searcher.rs
@@ -0,0 +1,79 @@
+$NetBSD$
+
+Skip attempts at using neon on big-endian aarch64.
+Ref. https://github.com/rust-lang/rust/issues/129819
+
+--- vendor/memchr-2.7.2/src/memmem/searcher.rs.orig 2024-09-01 10:22:12.705269507 +0000
++++ vendor/memchr-2.7.2/src/memmem/searcher.rs
+@@ -3,7 +3,7 @@ use crate::arch::all::{
+ rabinkarp, twoway,
+ };
+
+-#[cfg(target_arch = "aarch64")]
++#[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ use crate::arch::aarch64::neon::packedpair as neon;
+ #[cfg(all(target_arch = "wasm32", target_feature = "simd128"))]
+ use crate::arch::wasm32::simd128::packedpair as simd128;
+@@ -129,7 +129,7 @@ impl Searcher {
+ Searcher::twoway(needle, rabinkarp, prestrat)
+ }
+ }
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ {
+ if let Some(pp) = neon::Finder::with_pair(needle, pair) {
+ if do_packed_search(needle) {
+@@ -152,7 +152,7 @@ impl Searcher {
+ #[cfg(not(any(
+ all(target_arch = "x86_64", target_feature = "sse2"),
+ all(target_arch = "wasm32", target_feature = "simd128"),
+- target_arch = "aarch64"
++ all(target_arch = "aarch64", target_endian = "little")
+ )))]
+ {
+ if prefilter.is_none() {
+@@ -253,7 +253,7 @@ union SearcherKind {
+ avx2: crate::arch::x86_64::avx2::packedpair::Finder,
+ #[cfg(all(target_arch = "wasm32", target_feature = "simd128"))]
+ simd128: crate::arch::wasm32::simd128::packedpair::Finder,
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ neon: crate::arch::aarch64::neon::packedpair::Finder,
+ }
+
+@@ -421,7 +421,7 @@ unsafe fn searcher_kind_simd128(
+ /// # Safety
+ ///
+ /// Callers must ensure that the `searcher.kind.neon` union field is set.
+-#[cfg(target_arch = "aarch64")]
++#[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ unsafe fn searcher_kind_neon(
+ searcher: &Searcher,
+ _prestate: &mut PrefilterState,
+@@ -686,7 +686,7 @@ impl Prefilter {
+ }
+
+ /// Return a prefilter using a aarch64 neon vector algorithm.
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ #[inline]
+ fn neon(finder: neon::Finder, needle: &[u8]) -> Prefilter {
+ trace!("building aarch64 neon prefilter");
+@@ -763,7 +763,7 @@ union PrefilterKind {
+ avx2: crate::arch::x86_64::avx2::packedpair::Finder,
+ #[cfg(all(target_arch = "wasm32", target_feature = "simd128"))]
+ simd128: crate::arch::wasm32::simd128::packedpair::Finder,
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ neon: crate::arch::aarch64::neon::packedpair::Finder,
+ }
+
+@@ -852,7 +852,7 @@ unsafe fn prefilter_kind_simd128(
+ /// # Safety
+ ///
+ /// Callers must ensure that the `strat.kind.neon` union field is set.
+-#[cfg(target_arch = "aarch64")]
++#[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ unsafe fn prefilter_kind_neon(
+ strat: &Prefilter,
+ haystack: &[u8],
diff --git a/rust180/patches/patch-vendor_memchr-2.7.2_src_vector.rs b/rust180/patches/patch-vendor_memchr-2.7.2_src_vector.rs
new file mode 100644
index 0000000000..68629769b6
--- /dev/null
+++ b/rust180/patches/patch-vendor_memchr-2.7.2_src_vector.rs
@@ -0,0 +1,15 @@
+$NetBSD$
+
+Avoid using neon on big-endian aarch64.
+
+--- vendor/memchr-2.7.2/src/vector.rs.orig 2024-08-31 21:43:37.853458080 +0000
++++ vendor/memchr-2.7.2/src/vector.rs
+@@ -293,7 +293,7 @@ mod x86avx2 {
+ }
+ }
+
+-#[cfg(target_arch = "aarch64")]
++#[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ mod aarch64neon {
+ use core::arch::aarch64::*;
+
diff --git a/rust180/patches/patch-vendor_zerocopy-0.7.32_src_lib.rs b/rust180/patches/patch-vendor_zerocopy-0.7.32_src_lib.rs
new file mode 100644
index 0000000000..35ab52f6cb
--- /dev/null
+++ b/rust180/patches/patch-vendor_zerocopy-0.7.32_src_lib.rs
@@ -0,0 +1,25 @@
+$NetBSD$
+
+Attempt at skipping SIMD / neon on big-endian aarch64,
+ref. https://github.com/rust-lang/rust/issues/129819.
+
+--- vendor/zerocopy-0.7.32/src/lib.rs.orig 2024-09-01 12:56:49.837065351 +0000
++++ vendor/zerocopy-0.7.32/src/lib.rs
+@@ -3715,7 +3715,7 @@ mod simd {
+ powerpc64, powerpc64, vector_bool_long, vector_double, vector_signed_long, vector_unsigned_long
+ );
+ simd_arch_mod!(
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ aarch64, aarch64, float32x2_t, float32x4_t, float64x1_t, float64x2_t, int8x8_t, int8x8x2_t,
+ int8x8x3_t, int8x8x4_t, int8x16_t, int8x16x2_t, int8x16x3_t, int8x16x4_t, int16x4_t,
+ int16x8_t, int32x2_t, int32x4_t, int64x1_t, int64x2_t, poly8x8_t, poly8x8x2_t, poly8x8x3_t,
+@@ -7998,7 +7998,7 @@ mod tests {
+ vector_signed_long,
+ vector_unsigned_long
+ );
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ #[rustfmt::skip]
+ test_simd_arch_mod!(
+ aarch64, float32x2_t, float32x4_t, float64x1_t, float64x2_t, int8x8_t, int8x8x2_t,
diff --git a/rust180/patches/patch-vendor_zerocopy-0.7.34_src_lib.rs b/rust180/patches/patch-vendor_zerocopy-0.7.34_src_lib.rs
new file mode 100644
index 0000000000..59a16f65d4
--- /dev/null
+++ b/rust180/patches/patch-vendor_zerocopy-0.7.34_src_lib.rs
@@ -0,0 +1,25 @@
+$NetBSD$
+
+Attempt at skipping SIMD / neon on big-endian aarch64,
+ref. https://github.com/rust-lang/rust/issues/129819.
+
+--- vendor/zerocopy-0.7.34/src/lib.rs.orig 2024-08-31 21:15:29.602997509 +0000
++++ vendor/zerocopy-0.7.34/src/lib.rs
+@@ -3727,7 +3727,7 @@ mod simd {
+ powerpc64, powerpc64, vector_bool_long, vector_double, vector_signed_long, vector_unsigned_long
+ );
+ simd_arch_mod!(
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ aarch64, aarch64, float32x2_t, float32x4_t, float64x1_t, float64x2_t, int8x8_t, int8x8x2_t,
+ int8x8x3_t, int8x8x4_t, int8x16_t, int8x16x2_t, int8x16x3_t, int8x16x4_t, int16x4_t,
+ int16x8_t, int32x2_t, int32x4_t, int64x1_t, int64x2_t, poly8x8_t, poly8x8x2_t, poly8x8x3_t,
+@@ -8020,7 +8020,7 @@ mod tests {
+ vector_signed_long,
+ vector_unsigned_long
+ );
+- #[cfg(target_arch = "aarch64")]
++ #[cfg(all(target_arch = "aarch64", target_endian = "little"))]
+ #[rustfmt::skip]
+ test_simd_arch_mod!(
+ aarch64, float32x2_t, float32x4_t, float64x1_t, float64x2_t, int8x8_t, int8x8x2_t,
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