CVS commit: wip/verilog

["Makoto Fujiwara" <makoto%users.sourceforge.net@localhost>]

Module name:    wip
Committed by:   makoto
Date:           Fri Dec 20 13:33:27 UTC 2013

Added Files:
        wip/verilog: DESCR Makefile PLIST buildlink3.mk distinfo
        wip/verilog/patches: patch-aa patch-ad patch-cadpli_Makefile
            patch-vpi_Makefile

Log Message:
Import verilog-0.9.7 as wip/verilog.

Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a
compiler, compiling source code writen in Verilog (IEEE-1364) into some target
format. For batch simulation, the compiler can generate C++ code that is
compiled and linked with a run time library (called "vvm") then executed as
a command to run the simulation. For synthesis, the compiler generates
netlists in the desired format.

The compiler proper is intended to parse and elaborate design descriptions
written to the IEEE standard IEEE Std 1364-1995. This is a fairly large and
complex standard, so it will take some time for it to get there, but that's
the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well,
and some -1999 features will creep in.

To generate a diff of this commit:
cvs -z3 rdiff -u -r0 -r1.1 wip/verilog/DESCR wip/verilog/Makefile \
    wip/verilog/PLIST wip/verilog/buildlink3.mk wip/verilog/distinfo \
    wip/verilog/patches/patch-aa wip/verilog/patches/patch-ad \
    wip/verilog/patches/patch-cadpli_Makefile \
    wip/verilog/patches/patch-vpi_Makefile

To view a diff of this commit:
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/DESCR?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/Makefile?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/PLIST?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/buildlink3.mk?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/distinfo?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/patches/patch-aa?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/patches/patch-ad?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/patches/patch-cadpli_Makefile?r1=0&r2=1.1
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog/patches/patch-vpi_Makefile?r1=0&r2=1.1

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

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