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CVS commit: wip/verilog-current
Module name: wip
Committed by: makoto
Date: Mon Dec 29 10:56:18 UTC 2014
Modified Files:
wip/verilog-current: Makefile PLIST distinfo
Log Message:
Re: [Iverilog-devel] More vec4-stack progress
From: Stephen Williams <steve@ic...> - 2014-12-05 22:05:48
....
OK, that's very useful feedback. Given that, and assuming no other
complaints, I will merge the vec4-stack branch into git master tomorrow,
Saturday, 6 Dec. in the morning.
In the mean time, I've made a 20141205 snapshot available in the
usual FTP download site. That is the last snapshot before the big
merge.
....
To generate a diff of this commit:
cvs -z3 rdiff -u -r1.1 -r1.2 wip/verilog-current/PLIST
cvs -z3 rdiff -u -r1.2 -r1.3 wip/verilog-current/distinfo
cvs -z3 rdiff -u -r1.5 -r1.6 wip/verilog-current/Makefile
To view a diff of this commit:
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/PLIST?r1=1.1&r2=1.2
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/distinfo?r1=1.2&r2=1.3
http://pkgsrc-wip.cvs.sourceforge.net/pkgsrc-wip/wip/verilog-current/Makefile?r1=1.5&r2=1.6
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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