Possibly related to this, but possibly not, here's a double fault
into the prom.... The PC in question is prom_enter. It makes me wonder
whether the switch to UVM is problematic with the re-entering the prom
code that we have to do because we haven't finished console uart stuff
(zsc at gbus...)....

CPU 8 halted
  halt code = 6
  double error halt
  PC = fffffc00005aa7f0				<<<<<	prom_enter
Haltcode 6 Double Machine Check
  03022636  WATCH$: 02-03-99 02:38:54
  00006302
  00000200  Frame Size
  00000000  Flag bits
  00000118  CPU Area Offset
  000001a0  System Area Offset
  0000fff0  MCheck Reason Mask
  00000001  MCheck Frame Rev
EV5 IPRs:
  exc_addr:  fffffc00 005aa7f0  exc_sum:     00000000 00000000
  exc_mask:  00000000 00000000  isr:         00000000 00100000
  icsr:      00000061 60000000  icpe_stat:   00000000 00002000
  dcpe_stat: 00000000 00000000  va:          fffffe00 07533fb8
  mm_stat:   00000000 00016e91  sc_addr:     ffffff00 0001d28f
  sc_stat:   00000000 00000000  bc_tag_addr: ffffff80 00cfcfff
  ei_addr:   ffffff00 0011575f  ei_stat:     fffffff0 04ffffff
  fill_syn:  00000000 00009000  ld_lock:     ffffff00 01783a7f
  pal_base:  00000000 00018000  sys_ipr1:    00000000 00510008
TLEP CSRs:
        tldev: 51008011       tlber: 00800490
        tlcnr: 00000140       tlvid: 00000098
       tlesr0: 00400303      tlesr1: 00400c0c
       tlesr2: 00406060      tlesr3: 00409090
     tlepaerr: 00040200    tlepderr: 00000000
     tlepmerr: 00000000       tlvmg: 00000000
  tlintrmask0: 000001ff  tlintrsum0: 00000802
  tlintrmask1: 00000000  tlintrsum1: 00000000
TLSB Node 4
  TLDEV     51008011  TLBER     00800490
  TLESR0    00400303  TLESR1    00400c0c
  TLESR2    00406060  TLESR3    00409090
  TLEPAERR  00040200  TLEPDERR  00000000
  TLEPMERR  00000000  TLEPWERR0 deadbeef
  TLEPWERR1 deadbeef  TLEPWERR2 deadbeef
  TLEPWERR3 deadbeef
TLSB Node 5
  TLDEV     00005000  TLBER     00100000
  TLESR0    00000303  TLESR1    00000c0c
  TLESR2    00006060  TLESR3    00009090
  TLFADR0   00115740  TLFADR1   07850000
  TLVID     00000080  TLMIR     80000001
  MCR       00000234  MER       00000001
TLSB Node 8
  TLDEV     00002020  TLBER     00000000
  TLESR0    00000000  TLESR1    00000000
  TLESR2    00000000  TLESR3    00000000
  ICCNSE    00000000  ICCWTR    00000000
  IDPNSE0   00000006  IDPNSE1   00000006
  IDPNSE2   00000000  IDPNSE3   00000000
IOP Node 8 Hose 0
  PCIERR0 00000000 PCIERR1 00000000 
IOP Node 8 Hose 1
  PCIERR0 00004001 PCIERR1 00020000 PCIERR2 00000000 
CPU 8 has 2 Halt Data Log entries