>From bounces-tech-kern-owner-track=Plectere.com@NetBSD.org Tue Jan 25 08:38:55 2005
>X-Original-To: tech-kern@NetBSD.org
>Delivered-To: tech-kern@NetBSD.org
>Date: Tue, 25 Jan 2005 17:00:42 +0100
>From: Jochen Kunz <jkunz@unixag-kl.fh-kl.de>
>To: List Mail User <track@Plectere.com>
>Cc: port-alpha@NetBSD.org, tech-kern@NetBSD.org
>Subject: Re: Should Alpha PCI code manage latency timers?
>In-Reply-To: <200501242348.j0ONmnlj005037@Plectere.com>
>References: <200501242348.j0ONmnlj005037@Plectere.com>
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>On Mon, 24 Jan 2005 15:48:49 -0800 (PST)
>List Mail User <track@Plectere.com> wrote:
>
>> Could someone else check some other non-x86 machines, both old and
>> relatively current to see the behavior
>
>Sun Ultra 10:
>
>[@Zimbo root]$ pcictl pci2 list 
>002:01:0: Symbios Logic 53c875/876 (SCSI mass storage, revision 0x04)
>002:02:0: Opti RM861HA (USB serial bus, interface 0x10, revision 0x10)
>002:03:0: Digital Equipment DECchip 21142/21143 10/100 Ethernet (ethernet network, revision 0x30)
>002:04:0: Digital Equipment DEFPA (FDDI network, revision 0x01)
>[@Zimbo root]$ pcictl pci2 dump -d 1 -f 0 |grep -i lat
>    Latency Timer: 0x8c
>    Maximum Latency: 0x40
>[@Zimbo root]$ pcictl pci2 dump -d 2 -f 0 |grep -i lat 
>    Latency Timer: 0x00
>    Maximum Latency: 0x00
>[@Zimbo root]$ pcictl pci2 dump -d 3 -f 0 |grep -i lat 
>    Latency Timer: 0xa5
>    Maximum Latency: 0x28
>[@Zimbo root]$ pcictl pci2 dump -d 4 -f 0 |grep -i lat 
>    Latency Timer: 0x88
>    Maximum Latency: 0x00
>
>
>IBM RS/6000 43P-140:
>
>[@Dizzle root]$ pcictl pci1 list
>001:01:0: Digital Equipment DECchip 21140 ("FasterNet") 10/100 Ethernet (ethernet network, revision 0x22)
>[@Dizzle root]$ pcictl pci0 list 
>000:00:0: Motorola MPC106 "Grackle" Host Bridge (host bridge, revision 0x30)
>000:11:0: IBM ISA Bridge w/PnP (ISA bridge, revision 0x03)
>000:12:0: Advanced Micro Devices PCnet-PCI Ethernet (ethernet network, revision 0x16)
>000:13:0: IBM MPIC (undefined subclass 0x00)
>000:16:0: Symbios Logic 53c825 (SCSI mass storage, revision 0x13)
>000:23:0: IBM 82351 PCI-PCI Bridge (PCI bridge, revision 0x01)
>000:31:7: unknown vendor 0xff07 product 0xffff (undefined subclass 0xff, interface 0xff, revision 0xff)
>[@Dizzle root]$ pcictl pci1 dump -d 1 -f 0 |grep -i lat
>    Latency Timer: 0xff
>    Maximum Latency: 0x28
>[@Dizzle root]$ pcictl pci0 dump -d 0 -f 0 |grep -i lat 
>    Latency Timer: 0x00
>    Maximum Latency: 0x00
>[@Dizzle root]$ pcictl pci0 dump -d 11 -f 0 |grep -i lat
>    Latency Timer: 0x00
>    Maximum Latency: 0x00
>[@Dizzle root]$ pcictl pci0 dump -d 12 -f 0 |grep -i lat 
>    Latency Timer: 0xff
>    Maximum Latency: 0xff
>[@Dizzle root]$ pcictl pci0 dump -d 13 -f 0 |grep -i lat 
>    Latency Timer: 0x00
>    Maximum Latency: 0x00
>[@Dizzle root]$ pcictl pci0 dump -d 23 -f 0 |grep -i lat 
>    Latency Timer: 0xf8
>    Secondary bus latency timer: 0x00
>[@Dizzle root]$ pcictl pci0 dump -d 31 -f 7 |grep -i lat 
>    Latency Timer: 0xff
>
>-- 
>
>
>tschüß,
>       Jochen
>
>Homepage: http://www.unixag-kl.fh-kl.de/~jkunz/
>
	From today's earlier traffic of this thread, this looks to be all
correct (though the values are probably higher than needed).  The 0xf8 vs.
0xff seems to be the "allowed" low-order bits implimented as read-only zeros
and the ISA bridge is unlikely to support PCI busmastership (ISA emulation
can easily fit in the two cycle case, since most ISA DMA is at an effective
rate of 4MHZ per 16-bit transfer).  Also I assume the MPIC is likely not a
bus-master device.

	Thanks for checking,

	Paul Shupak