Re: Yes, NetBSD still boots on pretty ancient Alphas...

[Jason Thorpe <thorpej%me.com@localhost>]

> On Jul 24, 2021, at 7:51 AM, Jason Thorpe <thorpej%me.com@localhost> wrote:
> 
> Anyway, I’m almost convinced it’s something to do with how we’re configuring the SCSI controller.  I’m doing a little more investigation today and hopefully will have something to try out in a little while.

Ok, let me explain what I mean here.

There are two types interrupt triggers on EISA… edge trigger and level trigger.

With edge trigger, the PIC detects the interrupt on the RISING EDGE (i.e. transition from low-to-high) of the interrupt line.

With level trigger, the PIC detects the interrupt so long as the interrupt line is driven low (i.e. the line has a pull-up resistor enabled in this mode, and the interrupt lines on the devices are open-drain).

Our “ahb” driver is always registering the interrupt handler as level triggered.

The 1740 controller has a configuration register for its interrupts, INTDEF, where we can read the IRQ that it’s configured to use (we could also read this from the ECU data on Alpha, and I would like to enhance the driver to do that, but that can wait for another day).  One of the bits in that register is called INTHIGH.  There is a comment in the ahbreg.h file:

#define INTHIGH 0x08            /* int high=ACTIVE (else edge) */

I believe this comment is **incorrect**.  Well, *partially* incorrect.  I do believe it means “IRQ signal is active-high”, but as I have explained above, active-high (well, transition from low-to-high) is how edge triggered interrupts work, so “else edge” doesn’t make sense… what that really should say is “else level”.  I double-checked what Linux does with this bit, and while they don’t define a name for it, their driver treats this bit as "edge trigger".

So, what I think is that the firmware has configured the SCSI controller for an active-high (i.e. “edge triggered”) interrupt, which tells the microcontroller on the card to hold the interrupt line low.  But we’re registering the handler as “level triggered”, and thus causing the PIC to be programmed to signal an interrupt so long as that line is low.

Remember how there was previously evidence of an interrupt storm?  :-)

-- thorpej