Re: amd64 panic in FPU (Xen and bare-metal)

[Manuel Bouyer <bouyer%antioche.eu.org@localhost>]

On Sun, Jun 21, 2020 at 04:30:54PM +0200, Manuel Bouyer wrote:
> On Sun, Jun 21, 2020 at 03:51:07PM +0200, Maxime Villard wrote:
> > your assert is not correct, you put the check after sti
> 
> Ha yes, I knew I missed something :)
> With the check before STI it doens't fire any more on bare metal, or
> Xen PVH.
> It still does on Xen PV.
> Hum, maybe there's a place where interrupts are not disabled as they should be
> in the PV case.  Still investigating ...

This is the hint I was looking for. traps and syscall callback are
called with events enabled from Xen.

For syscalls it may not be that bad. For the FPU trap we may have to
reload the FPU context after disabling events.

-- 
Manuel Bouyer <bouyer%antioche.eu.org@localhost>
     NetBSD: 26 ans d'experience feront toujours la difference
--