Sorry for late response.

>>>>> On Tue, 10 Oct 2000 11:41:23 +0900 (JST),
	Noriyuki Soda <soda@sra.co.jp> said:

> I cannot access the technical specs at least until this weekend,
> since I'm in the middle of a business trip now.
> Also, I have vague memory that the specs only describes the behaviour
> of the currently coded case of the R4030_SYS_IT_STAT.

The memory is correct.
ARC chip R4030 (and it's second source NEC uPD31432) manual describes
that the address of interval timer status register is 0x80000230.

If ARC chipset generation of your machine is newer than original
Magnum, interval timer status register address may be 0x800001a8
(see pica/rd94.h), but your machine seems to be not so newer, mmmm.
--
soda