Subject: Getting video to work on r2000 arc types NEC_R94
To: None <port-arc@netbsd.org>
From: Bob Meader <bob@cci.net>
List: port-arc
Date: 09/14/2001 14:29:12
I see that someone has got r2000 (arc firmware type NEC_R94)
boot with a serial console using the 'arc.iso' image I
generated back in March...
Now if we want video to work this is what must done...
First in consinit() in machdep.c
the load for the video driver is currently
case MAGNUM:
case NEC_R94:
#if NRASDISPLAY_JAZZIO > 0
if (rasdisplay_jazzio_cnattach()) {
#if NPCKBC_JAZZIO > 0
pckbc_cnattach(&pica_bus, PICA_SYS_KBD,
JAZZIO_KBCMDP, PCKBC_KBD_SLOT);
#endif
return;
}
#endif
break;
case NEC_RAx94:
#if 0 /* XXX - physical address unknown */
#if NPC_PICA > 0
pccnattach();
return;
#endif
#endif
break;
NOTICE the jazzio rasdisplay driver doesn't exit !
So the above code basically collapses to
case MAGNUM:
case NEC_R94:
break;
case NEC_RAx94:
break;
NEC_R94 and NEC_RAx94 are very similiar one is PCI the other
is EISA..
Now to get video to work we need to know two thing's
a.The chipset
b.Physical address.
The first can be determined by yanking the case off in looking
inside ! The second well hmm so far in NEC hardware the
video controller has existed at only two different addresses
(which is great news because were talking a 64bit address space !),
one is 'jazz' controller space the other PCI/EISA io space (ie
io card space).
So to make this happen
1.Get the kernel source I hacked/used...
ftp://204.57.142.148/NetBSD-1.5/sys.tar.gz
2. Get build a updated "config" and mk's from
ftp://guiduck.com/incoming/mips/confmk.tar.gz
3. Optional/Recommend get updated/corrected
elf2ecoff
ftp://guiduck.com/incoming/mips/elf2ecoff
4. Goto /sys/arch/arc/conf
Look at modify 'generic' to tastes... note
two generic's exist use the one with 'arcsiop' in it!
5 Config/build/test kernel to see if boots OK
(still serial console only).
6. Now comes the fun/hard work part..
7. If the chipset is S3 add the 'S3' stuff to
vgatable.h and make change to machdep.c.
If the video chip isn't S3 or cirrus make the
'generic' stuff change to machdep.c
8. Now comes the guess part... hopefully the
video card is at one of two physical addresses...
I could code for both at end (the consinit() stuff)
pick one at random if it does work remove it and try
the other... If neithor one works well I guess
we have a new 'unknown' try pick some NEC engineer's mind!
P.S. the stuff above applies to NEC_Rax94 as well... HINT HINT you
get it to work too.
========================= add to /sys/arch/arc/arc/vgatable.h
#define S3Vendor 0x5333
struct VgaRegs S3TextRegs[NREGS+1] = {
/* port index value */
/* SR Regs */
{ 0x3c4, 0x1, 0x0 },
{ 0x3c4, 0x2, 0x3 },
{ 0x3c4, 0x3, 0x0 },
{ 0x3c4, 0x4, 0x2 },
/* CR Regs */
{ 0x3d4, 0x0, 0x5f },
{ 0x3d4, 0x1, 0x4f },
{ 0x3d4, 0x2, 0x50 },
{ 0x3d4, 0x3, 0x82 },
{ 0x3d4, 0x4, 0x55 },
{ 0x3d4, 0x5, 0x81 },
{ 0x3d4, 0x6, 0xbf },
{ 0x3d4, 0x7, 0x1f },
{ 0x3d4, 0x8, 0x00 },
{ 0x3d4, 0x9, 0x4f },
{ 0x3d4, 0xa, 0x0d },
{ 0x3d4, 0xb, 0x0e },
{ 0x3d4, 0xc, 0x00 },
{ 0x3d4, 0xd, 0x00 },
{ 0x3d4, 0xe, 0x00 },
{ 0x3d4, 0xf, 0x00 },
{ 0x3d4, 0x10, 0x9c },
{ 0x3d4, 0x11, 0x8e },
{ 0x3d4, 0x12, 0x8f },
{ 0x3d4, 0x13, 0x28 },
{ 0x3d4, 0x14, 0x1f },
{ 0x3d4, 0x15, 0x96 },
{ 0x3d4, 0x16, 0xb9 },
{ 0x3d4, 0x17, 0xa3 },
/* GR Regs */
{ 0x3ce, 0x0, 0x0 },
{ 0x3ce, 0x1, 0x0 },
{ 0x3ce, 0x2, 0x0 },
{ 0x3ce, 0x3, 0x0 },
{ 0x3ce, 0x4, 0x0 },
{ 0x3ce, 0x5, 0x10 },
{ 0x3ce, 0x6, 0xe },
{ 0x3ce, 0x7, 0x0 },
{ 0x3ce, 0x8, 0xff },
{ ENDMK }
};
====================== add to /sys/arch/arc/arc/machdep.c
========================================
static void unlocks3 __P((void));
static void
unlockS3(void)
{
/* From the S3 manual */
voutb(0x46E8, 0x10); /* Put into setup mode */
voutb(0x3C3, 0x10);
voutb(0x102, 0x01); /* Enable registers */
voutb(0x46E8, 0x08); /* Enable video */
voutb(0x3C3, 0x08);
voutb(0x4AE8, 0x00);
voutb(0x42E8, 0x80); /* Reset graphics engine? */
voutb(0x3D4, 0x38); /* Unlock all registers */
voutb(0x3D5, 0x48);
voutb(0x3D4, 0x39);
voutb(0x3D5, 0xA5);
voutb(0x3D4, 0x40);
voutb(0x3D5, inb(0x3D5)|0x01);
voutb(0x3D4, 0x33);
voutb(0x3D5, inb(0x3D5)&~0x52);
voutb(0x3D4, 0x35);
voutb(0x3D5, inb(0x3D5)&~0x30);
voutb(0x3D4, 0x3A);
voutb(0x3D5, 0x00);
voutb(0x3D4, 0x53);
voutb(0x3D5, 0x00);
voutb(0x3D4, 0x31);
voutb(0x3D5, inb(0x3D5)&~0x4B);
voutb(0x3D4, 0x58);
voutb(0x3D5, 0);
voutb(0x3D4, 0x54);
voutb(0x3D5, 0x38);
voutb(0x3D4, 0x60);
voutb(0x3D5, 0x07);
voutb(0x3D4, 0x61);
voutb(0x3D5, 0x80);
voutb(0x3D4, 0x62);
voutb(0x3D5, 0xA1);
voutb(0x3D4, 0x69); /* High order bits for cursor address */
voutb(0x3D5, 0);
voutb(0x3D4, 0x32);
voutb(0x3D5, inb(0x3D5)&~0x10);
}
=================== Change this in vga_reset in
/sys/arch/arc/arc/machdep.c====================================
( leave alone if chipset IS cirrus )
VgaTextRegs = GenVgaTextRegs;
voutw(0x3C4, 0x0612); /* unlock ext regs */
voutw(0x3C4, 0x0700); /* reset ext sequence mode */
voutw(0x3C4, 0x0120); /* disable video */
setTextRegs(VgaTextRegs); /* initial register setup */
setTextCLUT(); /* load color lookup table */
loadFont(); /* load font */
setTextRegs(VgaTextRegs); /* reload registers */
voutw(0x3C4, 0x0100); /* re-enable video */
voutb(0x3c2, 0x63); /* MISC */
=============== to this for S3
chipset===============================================
unlockS3();
VgaTextRegs = S3TextRegs;
voutw(0x3C4, 0x0120); /* disable video */
setTextRegs(VgaTextRegs); /* initial register setup */
setTextCLUT(); /* load color lookup table */
loadFont(ISA_mem); /* load font */
setTextRegs(VgaTextRegs); /* reload registers */
voutw(0x3C4, 0x0100); /* re-enable video */
voutb(0x3c2, 0x63); /* MISC */
voutb(0x3c2, 0x67); /* MISC */
===============to this for generic/unknown
chipset==================================
VgaTextRegs = GenVgaTextRegs;
outw(0x3C4, 0x0120); /* disable video */
setTextRegs(VgaTextRegs); /* initial register setup */
setTextCLUT(); /* load color lookup table */
loadFont(ISA_mem); /* load font */
setTextRegs(VgaTextRegs); /* reload registers */
outw(0x3C4, 0x0100); /* re-enable video */
outb(0x3c2, 0x63); /* MISC */
finally the video controller itself physically maybe in one of two spots :
==================== If it lies at "jazzio" space you need this
===============================================
static paddr_t
vga_jazzio_mmap(v, offset, prot)
void *v;
off_t offset;
int prot;
{
if (offset >= 0xa0000 && offset < 0xc0000)
return mips_btop(PICA_P_LOCAL_VIDEO + offset);
if (offset >= 0x0000 && offset < 0x10000)
return mips_btop(PICA_P_LOCAL_VIDEO_CTRL + offset);
if (offset >= 0x40000000 && offset < 0x40800000)
return mips_btop(PICA_P_LOCAL_VIDEO + offset - 0x40000000);
return -1;
}
void
consinit()
{
case MAGNUM:
#if NVGA_JAZZIO > 0
if (vga_jazzio_cnattach() == 0) {
#if NPCKBC_JAZZIO > 0
pckbc_cnattach(&pica_bus, PICA_SYS_KBD,
JAZZIO_KBCMDP, PCKBC_KBD_SLOT);
#endif
return;
}
#endif
break;
case NEC_94:
{
static struct arc_bus_space vga_io, vga_mem;
arc_bus_space_init(&vga_io, "vga_jazzio_io",
PICA_P_LOCAL_VIDEO_CTRL, PICA_V_LOCAL_VIDEO_CTRL,
0, PICA_S_LOCAL_VIDEO_CTRL);
arc_bus_space_init(&vga_mem, "vga_jazzio_mem",
PICA_P_LOCAL_VIDEO, PICA_V_LOCAL_VIDEO,
0, PICA_S_LOCAL_VIDEO);
vga_reset(&vga_io, &vga_mem);
if (vga_isa_extendattach(&arc_bus_io, &arc_bus_mem,vga_jazzio_mmap) == 0)
{
pckbc_cnattach(&pica_bus, PICA_SYS_KBD,
JAZZIO_KBCMDP, PCKBC_KBD_SLOT);
return;
}
}
break;
case NEC_RAx94:
===========================if it lies at standard eisa io space ============
void
consinit()
{
case MAGNUM:
break;
case NEC_R94:
#if NVGA_ISA > 0
vga_reset(&arc_bus_io, &arc_bus_mem);
if (vga_isa_extendattach(&arc_bus_io, &arc_bus_mem,vga_cirrusio_mmap) ==
0) {
#if NPCKBC_JAZZIO > 0
pckbc_cnattach(&pica_bus, PICA_SYS_KBD,
JAZZIO_KBCMDP, PCKBC_KBD_SLOT);
#endif
return;
}
#endif
break;
case NEC_RAx94:
#if 0 /* XXX - physical address unknown */