Subject: Re: Serious problems in either gcc or pmap
To: David Laight <david@l8s.co.uk>
From: Richard Earnshaw <rearnsha@arm.com>
List: port-arm
Date: 04/24/2002 13:42:07
> On Mon, Apr 22, 2002 at 04:48:22PM +0100, Richard Earnshaw wrote:
> > Dump of assembler code for function FontCouldBeTerminal:
> > 0x10f7c>: stmdb   sp!, {r4, r5, r6, r7, lr}
> > 0x10f80>: sub     sp, sp, #4      ; 0x4
> ...
> > 0x11028>: mov     r0, #0  ; 0x0
>             add     sp, sp, #4
> > 0x1102c>: ldmia   sp!, {r4, r5, r6, r7, pc}
> 
> Isn't is likely to be faster to align the stack by ensuring
> that an even number of registers are saved/restored, rather
> than having 2 extra instructions to modify the sp?
> 
> The single stack location is more likely to be in the
> D-cache than the two instructions are in the I-cache.

Probably, but getting correct code at this point is more important than 
the most efficient.  Doing this by locating a register that isn't pushed, 
but is safe to push (ie doesn't interfere with the entry or exit sequence) 
is far more complicated, and thus, more likely to be incorrect.

R.