Subject: Big-endian port teaser
To: None <port-arm@netbsd.org>
From: Jason R Thorpe <thorpej@wasabisystems.com>
List: port-arm
Date: 08/15/2002 17:18:33
I just got the kernel to come up on this board. Haven't glued in device
support yet, but I wanted to post a teaser anyhow :-)
This board also runs little-endian (there's a jumper on the board to
select which the CPU starts with), but I only have a big-endian firmware
image for it.
+
ARM eCos
RedBoot(tm) debug environment - built 14:44:25, Jan 9 2002
Platform: BRH-BE (XScale)
Copyright (C) 2000, Red Hat, Inc.
RAM: 0xc0000000-0xc8000000
RedBoot> load -r -b 0xc0200000 -m xmodem
..Raw file loaded 0xc0200000-0xc0396d00
xyzModem - CRC mode, 13021(SOH)/0(STX)/0(CAN) packets, 4 retries
RedBoot> g 0xc0200000
NetBSD/evbarm (ADI BRH) booting ...
initarm: Configuring system ...
physmemory: 8192 pages at 0xc0000000 -> 0xc1ffffff
init subsystems: stacks vectors undefined page pmap irq done.
[ using 155940 bytes of netbsd ELF symbol table ]
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002
The NetBSD Foundation, Inc. All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
NetBSD 1.6F (ADI_BRH) #27: Thu Aug 15 16:56:00 PDT 2002
thorpej@yeah-baby.shagadelic.org:/u1/netbsd/src/sys/arch/evbarm/compile/ADI_BRH
total memory = 32768 KB
avail memory = 25404 KB
using 435 buffers containing 1740 KB of memory
mainbus0 (root)
cpu0 at mainbus0: i80200 step A-1 (XScale core)
cpu0: DC enabled IC enabled WB enabled LABT
cpu0: 32KB/32B 32-way Instruction cache
cpu0: 32KB/32B 32-way write-back-locking Data cache
obio0 at mainbus0
com0 at obio0 addr 0x03000000: ns16550a, working fifo
com0: console
com1 at obio0 addr 0x03100000: ns16550a, working fifo
becc0 at mainbus0: ADI Big Endian Companion Chip
clock: hz=100 stathz=0 profhz=0
boot device: <unknown>
root device:
--
-- Jason R. Thorpe <thorpej@wasabisystems.com>