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> - who uses irqblock[]?

as it seems there is nothing using irqblock, i'd like to remove it.
can anyone review the attached patch?  thanks.

YAMAMOTO Takashi

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Index: arch/shark/isa/isa_irqhandler.c
===================================================================
RCS file: /cvsroot/src/sys/arch/shark/isa/isa_irqhandler.c,v
retrieving revision 1.7
diff -u -p -r1.7 isa_irqhandler.c
--- arch/shark/isa/isa_irqhandler.c	11 Dec 2005 12:19:02 -0000	1.7
+++ arch/shark/isa/isa_irqhandler.c	4 May 2006 12:45:52 -0000
@@ -97,7 +97,6 @@ u_int actual_mask;
 u_int disabled_mask;
 u_int spl_mask;
 u_int irqmasks[IPL_LEVELS];
-u_int irqblock[NIRQS];
 
 extern u_int soft_interrupts;	/* Only so we can initialise it */
 
@@ -125,7 +124,6 @@ irq_init()
 	/* Clear all the IRQ handlers and the irq block masks */
 	for (loop = 0; loop < NIRQS; ++loop) {
 		irqhandlers[loop] = NULL;
-		irqblock[loop] = 0;
 	}
 
 	/*
@@ -362,23 +360,6 @@ irq_calculatemasks()
 	 * avoid overruns, so serial > high.
 	 */
 	irqmasks[IPL_SERIAL] &= irqmasks[IPL_HIGH];
-
-	/*
-	 * We now need to update the irqblock array. This array indicates
-	 * what other interrupts should be blocked when interrupt is asserted
-	 * This basically emulates hardware interrupt priorities e.g. by
-	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
-	 * is asserted. For each interrupt we find the highest IPL and set
-	 * the block mask to the interrupt mask for that level.
-	 */
-
-	/* And eventually calculate the complete masks. */
-	for (irq = 0; irq < NIRQS; irq++) {
-		int irqs = 1 << irq;
-		for (ptr = irqhandlers[irq]; ptr; ptr = ptr->ih_next)
-			irqs |= ~(irqmasks[ptr->ih_level]);
-		irqblock[irq] = irqs;
-	}
 }
 
 
Index: arch/arm/iomd/iomd_irqhandler.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/iomd_irqhandler.c,v
retrieving revision 1.9
diff -u -p -r1.9 iomd_irqhandler.c
--- arch/arm/iomd/iomd_irqhandler.c	11 Dec 2005 12:16:47 -0000	1.9
+++ arch/arm/iomd/iomd_irqhandler.c	4 May 2006 12:45:52 -0000
@@ -65,7 +65,6 @@ u_int actual_mask;
 u_int disabled_mask;
 u_int spl_mask;
 u_int irqmasks[IPL_LEVELS];
-u_int irqblock[NIRQS];
 
 extern u_int soft_interrupts;	/* Only so we can initialise it */
 
@@ -89,7 +88,6 @@ irq_init()
 	/* Clear all the IRQ handlers and the irq block masks */
 	for (loop = 0; loop < NIRQS; ++loop) {
 		irqhandlers[loop] = NULL;
-		irqblock[loop] = 0;
 	}
 
 	/* Clear the IRQ/FIQ masks in the IOMD */
@@ -145,7 +143,6 @@ irq_claim(irq, handler)
 	irqhandler_t *handler;
 {
 	int level;
-	int loop;
 	u_int oldirqstate;
 
 #ifdef DIAGNOSTIC
@@ -249,32 +246,6 @@ irq_claim(irq, handler)
 #endif
 	}
 
-	/*
-	 * We now need to update the irqblock array. This array indicates
-	 * what other interrupts should be blocked when interrupt is asserted
-	 * This basically emulates hardware interrupt priorities e.g. by
-	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
-	 * is asserted. For each interrupt we find the highest IPL and set
-	 * the block mask to the interrupt mask for that level.
-	 */
-	for (loop = 0; loop < NIRQS; ++loop) {
-		irqhandler_t *ptr;
-
-		ptr = irqhandlers[loop];
-		if (ptr) {
-			/* There is at least 1 handler so scan the chain */
-			level = ptr->ih_level;
-			while (ptr) {
-				if (ptr->ih_level > level)
-					level = ptr->ih_level;
-				ptr = ptr->ih_next;
-			}
-			irqblock[loop] = ~irqmasks[level];
-		} else
-			/* No handlers for this irq so nothing to block */
-			irqblock[loop] = 0;
-	}
-
 	enable_irq(irq);
 	set_spl_masks();
 	restore_interrupts(oldirqstate);
@@ -295,7 +266,6 @@ irq_release(irq, handler)
 	irqhandler_t *handler;
 {
 	int level;
-	int loop;
 	irqhandler_t *irqhand;
 	irqhandler_t **prehand;
 #ifdef IRQSTATS
@@ -380,32 +350,6 @@ irq_release(irq, handler)
 	}
 
 	/*
-	 * We now need to update the irqblock array. This array indicates
-	 * what other interrupts should be blocked when interrupt is asserted
-	 * This basically emulates hardware interrupt priorities e.g. by
-	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
-	 * is asserted. For each interrupt we find the highest IPL and set
-	 * the block mask to the interrupt mask for that level.
-	 */
-	for (loop = 0; loop < NIRQS; ++loop) {
-		irqhandler_t *ptr;
-
-		ptr = irqhandlers[loop];
-		if (ptr) {
-			/* There is at least 1 handler so scan the chain */
-			level = ptr->ih_level;
-			while (ptr) {
-				if (ptr->ih_level > level)
-					level = ptr->ih_level;
-				ptr = ptr->ih_next;
-			}
-			irqblock[loop] = ~irqmasks[level];
-		} else
-			/* No handlers for this irq so nothing to block */
-			irqblock[loop] = 0;
-	}
-
-	/*
 	 * Disable the appropriate mask bit if there are no handlers left for
 	 * this IRQ.
 	 */
Index: arch/arm/ofw/ofw_irqhandler.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ofw/ofw_irqhandler.c,v
retrieving revision 1.5
diff -u -p -r1.5 ofw_irqhandler.c
--- arch/arm/ofw/ofw_irqhandler.c	11 Dec 2005 12:16:51 -0000	1.5
+++ arch/arm/ofw/ofw_irqhandler.c	4 May 2006 12:45:52 -0000
@@ -64,7 +64,6 @@ u_int actual_mask;
 u_int disabled_mask;
 u_int spl_mask;
 u_int irqmasks[IPL_LEVELS];
-u_int irqblock[NIRQS];
 extern u_int intrcnt[];
 
 extern u_int soft_interrupts;	/* Only so we can initialise it */
@@ -90,7 +89,6 @@ irq_init()
 	/* Clear all the IRQ handlers and the irq block masks */
 	for (loop = 0; loop < NIRQS; ++loop) {
 		irqhandlers[loop] = NULL;
-		irqblock[loop] = 0;
 	}
 
 	/*
@@ -218,33 +216,6 @@ irq_claim(irq, handler)
 #endif
 	}
 
-	/*
-	 * We now need to update the irqblock array. This array indicates
-	 * what other interrupts should be blocked when interrupt is asserted
-	 * This basically emulates hardware interrupt priorities e.g. by
-	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
-	 * is asserted. For each interrupt we find the highest IPL and set
-	 * the block mask to the interrupt mask for that level.
-	 */
-
-	for (loop = 0; loop < NIRQS; ++loop) {
-		irqhandler_t *ptr;
-
-		ptr = irqhandlers[loop];
-		if (ptr) {
-			/* There is at least 1 handler so scan the chain */
-			level = ptr->ih_level;
-			while (ptr) {
-				if (ptr->ih_level > level)
-					level = ptr->ih_level;
-				ptr = ptr->ih_next;
-			}
-			irqblock[loop] = ~irqmasks[level];
-		} else
-			/* No handlers for this irq so nothing to block */
-			irqblock[loop] = 0;
-	}
-
 	enable_irq(irq);
 	set_spl_masks();
 
@@ -347,32 +318,6 @@ irq_release(irq, handler)
 	}
 
 	/*
-	 * We now need to update the irqblock array. This array indicates
-	 * what other interrupts should be blocked when interrupt is asserted
-	 * This basically emulates hardware interrupt priorities e.g. by
-	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
-	 * is asserted. For each interrupt we find the highest IPL and set
-	 * the block mask to the interrupt mask for that level.
-	 */
-	for (loop = 0; loop < NIRQS; ++loop) {
-		irqhandler_t *ptr;
-
-		ptr = irqhandlers[loop];
-		if (ptr) {
-			/* There is at least 1 handler so scan the chain */
-			level = ptr->ih_level;
-			while (ptr) {
-				if (ptr->ih_level > level)
-					level = ptr->ih_level;
-				ptr = ptr->ih_next;
-			}
-			irqblock[loop] = ~irqmasks[level];
-		} else
-			/* No handlers for this irq so nothing to block */
-			irqblock[loop] = 0;
-	}
-
-	/*
 	 * Disable the appropriate mask bit if there are no handlers left for
 	 * this IRQ.
 	 */
Index: arch/arm/sa11x0/sa11x0_irqhandler.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_irqhandler.c,v
retrieving revision 1.8
diff -u -p -r1.8 sa11x0_irqhandler.c
--- arch/arm/sa11x0/sa11x0_irqhandler.c	5 Mar 2006 11:32:01 -0000	1.8
+++ arch/arm/sa11x0/sa11x0_irqhandler.c	4 May 2006 12:45:52 -0000
@@ -104,7 +104,6 @@ u_int imask[NIPL];
 u_int spl_mask;
 u_int irqmasks[IPL_LEVELS];
 #endif
-u_int irqblock[NIRQS];
 
 
 extern void set_spl_masks(void);
@@ -166,19 +165,6 @@ intr_calculatemasks(void)
 	for (level = IPL_LEVELS; level > 0; level--)
 		irqmasks[level - 1] |= irqmasks[level];
 #endif
-	/*
-	 * Calculate irqblock[], which emulates hardware interrupt levels.
-	 */
-	for (irq = 0; irq < ICU_LEN; irq++) {
-		int irqs = 1 << irq;
-		for (q = irqhandlers[irq]; q; q = q->ih_next)
-#ifdef hpcarm
-			irqs |= ~imask[q->ih_level];
-#else
-			irqs |= ~irqmasks[q->ih_level];
-#endif
-		irqblock[irq] = irqs;
-	}
 }
 
 

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