This is enough of a difference from other com-alikes to not be com-alike
at all. :-)

I think you need your own driver.  The chip looks simple enough that it
should be pretty easy.

    -- Garrett

Jesse Off wrote:
>> I have not seen your chip, but there's a good chance that the
>> programming model loosely follows the 16550 interface.  Certainly, there
>> is probably no real reason not to implement to the same API that I can
>> think of, but you'll have to check for yourself.
>>
>> FWIW, this driver supports many workalikes that have differences on
>> embedded boards, etc.
>>
>> Heck, if you send me docs for your part, I can quickly tell you (and
>> maybe even write a quick driver for it if it works) whether this part is
>> likely to be usable with com(4) or not.
>>
>
> The UART is somewhat of a "Technologic Systems special" UART I
> designed in Verilog and hand-tuned for FPGA synthesis with the primary
> purpose of being extremely small.   A 16550 implemented in an FPGA
> takes around 1500-2000 LUTs, this UART takes 70 LUTs (or 105 with a 5
> byte FIFO), parity is calculated with software, and only supports 8
> distinct baud rates.  We include 10 of these soft-uarts on the TS-7300
> board.  I don't have much docs besides whats in the comments of my
> Verilog source-- the core is very simple and only has 2 registers:
>
> // address 0: STAT register
> //   bit 0 - TBRE, Transmit buffer empty (RO)
> //   bit 1 - DR, Receive data ready (RO)
> //   bit 2 - OERR, Overflow error (RO)
> //   bit 3 - CTS, UART clear-to-send (RO)
> //   bit 4 - RTS, UART request-to-send (RW)
> //   bit 7:5 - MODE, baud rate (RW)
> //      0 - 115200 8N1
> //      1 - 57600 8N1
> //      2 - 38400 8N1
> //      3 - 19200 8N1
> //      4 - 9600 8N1
> //      5 - 4800 8N1
> //      6 - 2400 8N1
> //      7 - UART off, IRQ disabled
> //   bit 8 - NINEBIT enable (9N1) (RW)
> //   bit 9:15 - reserved
> // read address 1: RXDAT register (RX data register)
> // write address 1: TXDAT register (TX data register)
> //
> // * When NINEBIT mode is disabled, disregard bit 8 when
> //   reading RXDAT as its value will be UNDEFINED
> //
> // * Upper 7 bits of RXDAT and TXDAT are reserved and
> //   should be discarded from reads as their value will
> //   be UNDEFINED
> //
> // * If connected to 8-bit data bus 9N1 serial support is not
> //   supported.
> //
> // * IRQ is asserted when DR bit of STATUS reg
> //   asserted
> //
> // * IRQ is also triggered on transmitter busy to non-busy
> //    transition.  Cleared on register read.
>
> The UART is capable of 9-bit arbitrary data which is something only
> the 16950 can do easily.   Our customers need this for some strange
> applications in vending machines and certain types of RS485 serial
> networks.  The 9-bit mode is used for 8E1 or 8O1 with the parity bit
> computed in the driver via lookup table.  We've had to come up with a
> hybrid driver in Linux that can go into a "special mode" that passes
> 16-bits at a time to/from the /dev device node to accomodate the 9-bit
> raw data mode but I don't anticipate this being absolutely necessary
> for our NetBSD customers.
>
> // Jesse Off 


-- 
Garrett D'Amore, Principal Software Engineer
Tadpole Computer / Computing Technologies Division,
General Dynamics C4 Systems
http://www.tadpolecomputer.com/
Phone: 951 325-2134  Fax: 951 325-2191