On Feb 21, 2007, at 8:29 AM, Robert Swindells wrote:

>
> Toru Nishimura wrote:
>> Bucky Katz wrote;
>
>>> One of the things you will find _very_ frustrating about ARM, if you
>>> don't already, is that it's really about five different  
>>> architectures,
>>> and they all misbehave differently.  (You are in a maze of TRMS, all
>>> slightly different...)
>>>
>>> Six when you finally get the joy of ARM11 devices.
>
>> The diversity of interrupt HW machinery is _major_ burden against
>> NetBSD (and any other OS) porting.  I have three ARM9 SoC UMs at  
>> hand.
>> All the interrupt machinery designs differ each other in large  
>> degree.
>> NetBSD/arm, in general, does smart things with "ipending" global
>> variable to implement NetBSD-peculiar (other OS camp would call it
>> strange) spl(9) priority level scheme.  While this approach fits with
>> 32 way interrupt source, it is rather painful to adapt 64bit source.
>> Quite frankly, I'm doubtful whether ep93xx/ep93xx_intr.c is doing
>> spl(9) correctly.  dual VIC design is a mud pool.
>
> I think that the current interrupt mechanism relies on there being
> slightly less than 32 real interrupt sources so that there are some
> bits free for soft interrupts.

Not if we make the generic code in arm32/intr.c a bit more generic.