On Wed, Feb 21, 2007 at 10:12:51AM -0800, Bucky Katz wrote:
> 
> It's not unusual on ARM embedded systems to have > 32 interrupts, as
> GPIOs can be configured to generate interrupts and hardware guys love
> to use GPIOs for signalling.

Tell me about it .....
I did a vxworks port to a SA1100/SA1101 system.
IIRC the SA1100 has 64 interrupt bits, some of the gpio lines share one.
The SA1101 has a load more daisy-chained of one of the SA1100 IRQs.
We had a sound chip with several interrupts connected to one on the
1101's gpio lines.

The WRS supplied code put all the SA1100 interrupts into a single priority
chain - so theoretically a lot of interrupt stack would be needed.
It also did nothing about the disparate drivers that needed to share
cascaded interrupts, nor the fact that most of the gpio lines could be
set edge (either or both) or level sensitive.
I eneded up with about 256 interrupt sources and hacked the edge/level
into the priority field.

	David

-- 
David Laight: david@l8s.co.uk