The following patch allows to use one clock manager for a tree of
clocks when #clock-cells == 0, by looking for a clock manager up the
device tree until one is found or the root is met.
The decode function can know that the intended clock's phandle is given
in *data instead of an index thanks to the len == 0 parameter. It's not
cute but that's how the device tree is specified.
Could someone please commit it after reviewing it?
Regards,
Aymeric
diff --git a/sys/dev/fdt/fdt_clock.c b/sys/dev/fdt/fdt_clock.c
index f82e2c86b63a..519698293aef 100644
--- a/sys/dev/fdt/fdt_clock.c
+++ b/sys/dev/fdt/fdt_clock.c
@@ -95,16 +95,18 @@ fdtbus_clock_get_index_prop(int phandle, u_int index, const char *prop)
return NULL;
for (n = 0, resid = len; resid > 0; n++) {
- const int cc_phandle =
- fdtbus_get_phandle_from_native(be32toh(p[0]));
+ int cc_phandle = fdtbus_get_phandle_from_native(be32toh(p[0]));
if (of_getprop_uint32(cc_phandle, "#clock-cells", &clock_cells))
break;
if (n == index) {
- cc = fdtbus_get_clock_controller(cc_phandle);
+ do {
+ cc = fdtbus_get_clock_controller(cc_phandle);
+ cc_phandle = OF_parent(cc_phandle);
+ } while (cc == NULL && cc_phandle != -1);
if (cc == NULL)
break;
clk = cc->cc_funcs->decode(cc->cc_dev,
- clock_cells > 0 ? &p[1] : NULL, clock_cells * 4);
+ clock_cells > 0 ? &p[1] : &p[0], clock_cells * 4);
break;
}
resid -= (clock_cells + 1) * 4;