Hi,
  Ok yet more changes I have been working on this weekend and will be
committed shortly ...

All the CPU / MMU / TLB support functions are now directed throught a
structure of function pointers. This means that different routines can be
provided for different processors and the function pointed set after
probing the CPU type during boot.

This will mean that a single kernel will support the ARM6 / ARm7 and SA110
CPU's thus removing the need for having separate kernels for ARm6/7 and
for SA110. This change is scalable thus separate kernels will not be
needed for any new processors e.g. ARM8

All future voyager kernels will now support all standard RiscPC's no
matter what CPU card tey have fitted.

When building custom kernels it is possible to build them with support for
just a single CPU type to save space etc.

Other potential advantages that are not yet realised is that the kernel
could run with early aborts if an ARM6 is detected. (Up to now ARM7
supports has dictated that late aborts were always required.

As yet support for the ARM7500 requires a separate kernel due to the diffs
in the IOMD but I hope to eventually merge ARM7500 support into a gneric
kernels.

Cheers,
				Mark