On Mon, 27 Apr 1998, Kim G. S. OEyhus wrote:

> Is the message about bugged STM really a sign of Revision K?

I'm not sure - you'll have to wait for one of the experts to confirm or
deny this ...

> Oh, please, not! And I waited so long to order my strongarm,
> just to avoid things like this. If that really is so,
> then probably most StrongArm owners has incapable processors,
> which makes RiscBSD pointless for most of us RiscPC owners.

Yes, and it's a bl**dy pain. Perhaps a group of us should turn up at Acorn
holding our SA cards and refuse to leave until they replace them with
post-K versions ... :I

> However, why not just abandon the STM instruction, and replace it
> with multiple single store instructions? I assumed this was done.

Trapping this in running programs might be tricky? Clearly, the
possibility of compiling code which does not contain it is one option ...
but, 

> Or what about scanning and replacing the source code on loading?

this would require a special compiler (and everything else) build for
machines with the bugged chip - since those without it would be better off
using the normal source from a speed point of view. 

> Kim0

Well, let's wait and see what happens I guess. In the meanwhile, perhaps a
quick crosspost to one of the newsgroups is in order to see if it's
possible to glean a response from one of the regulars@acorn ...

Cheers,

Bill