Hi All,

an update... I've modified /usr/scr/sys/arch/arm32/riscpc/rpc_machdep.c to
be more chatty and discovered that the whole system crashes when it calls
setttb() at the end of the second bootstrap in order to switch to the
newly build L1 pages (around line 1000).... I checked the setttb() hook in
cpu_func_asm.S and couldn't find a discrepance with the ARM710a
documentation I've got. 

So, I think it's the L1 pages themselves.... wierd... is my
memory-configuration that odd? Netbsd reports :
  DRAM 0a  @  0x 10.000.000 size 01.000.000
  DRAM 0b  @  0x 18.000.000 size 00.100.000
  DRAM 1a  @  0x 1c.000.000 size 00.100.000
  DRAM 1b  @  0x 00.000.000 size 00.000.000
  VRAM 0   @  0x 02.000.000 size 00.200.000

just before the crach the printed L1 table looks like this :
   V 0x 00.000.000  - 10.1B2.011        page in domain 0
   V 0x 03.200.000  - 00.000.000 (????) marks fault
   V 0x 03.500.000  - 00.000.000 (????) marks fault
   V 0x f0.000.000  - 10.1b3.011        page in domain 0
   V 0x f1.000.000  - 10.1b8.011        page in domain 0
   V 0x f2.000.000  - 10.1bc.011        page in domain 0
   V 0x f3.000.000  - 10.1c0.011        page in domain 0
   V 0x f3.300.000  - 10.1cd.c11 (????) why this odd address ?
   V 0x f4.000.000  - 10.1b1.011        page in domain 0
   V 0x f6.000.000  - 03.200.412 (????) section, dom. 0, RW, RO in user
   V 0x ef.c00.000  - 10.1c5.811 (????) why this odd address ?
   V 0x ef.800.000  - 10.1c5.c11 (????) why this odd address ?

maybe a little bit too verbose, but maybe it's of help.. (and I hope the
addresses are OK and I've understood the MMU-docs :-) ) 

Cheers,

Reinoud