Subject: System halt when flush the data cache..
To: None <port-arm32@netbsd.org>
From: Johan Rydberg <johan.rydberg@netinsight.se>
List: port-arm32
Date: 12/07/1999 19:36:58
Hi!
I'm trying the access an I2C bus through a FPGA that is
attached to the XBUS.
I have mapped the XBUS using the following code:
...
map_valid = uvm_map_reserve(kernel_map, NBPG, 0, &fpga_address);
if(map_valid == FALSE)
{
panic("fpga: no mapping\n");
}
pmap_enter(pmap_kernel(), (vm_offset_t)fpga_address,
trunc_page(DC21285_XBUS_XCS1), VM_PROT_WRITE, TRUE, VM_PROT_WRITE);
...
This results in that I must flush the data cache when I have
set a bit in the register that controls the I2C bus. But when I
call "cpu_cache_flushD" the system halts.
I'm I doing something wrong here? Can I set the pages to be non-cachable
or something similar?
--
Johan Rydberg johan.rydberg@netinsight.net
Net Insight AB, Sweden direct: +46-8-685 04 17
http://www.netinsight.net phone: +46-8-685 04 00
fax: +46-8-685 04 20