On Tue, 7 Dec 1999, Johan Rydberg wrote:

>   pmap_enter(pmap_kernel(), (vm_offset_t)fpga_address,
>     trunc_page(DC21285_XBUS_XCS1), VM_PROT_WRITE, TRUE, VM_PROT_WRITE);
>   ...
> 
> This results in that I must flush the data cache when I have
> set a bit in the register that controls the I2C bus. But when I
> call "cpu_cache_flushD" the system halts.

Ok that is the sort of behaviour I would expect. cpu_cache_flushD() maps
to the SA110 D-cache flush operation which invalidates the whole cache.
The cache is write back and thus any dirty cache data e.g. stack etc. is
thrown away i.e. it is not written back to memory first.

This call should not be used under normal circumstances. Instead use
cpu_cache_purgeD() which will write back dirty data before invalidating
the cache.

> I'm I doing something wrong here? Can I set the pages to be non-cachable
> or something similar?
This page should not be cached anyway. pmap_enter() should only be setting
the PT_C bit in the page table entry if it is mapping physical RAM.

The only need may be to make sure that the virtual address is not already
in the cache which only needs to be done once.

Cheers,
				Mark