In <URL:news:local.netbsd.port-arm32> on Sat 02 Dec, Leo Smiers wrote:
> In <URL:news:local.port-arm32> on Sat 02 Dec, Reinoud Zandijk wrote:
> > Hi all,
> > 
> > 
> > I've also worked on StrongARM compatibility and i'm very very anxious to
> > see if it works OK ... I dont have a SA myself so i cant test my code :(
> > .... I looked at the usage of cp15 registers on the SA in the Linux loader
> > source and i hope it'll work fine now.
> > 
> > For sanity's sake please test a set and not mixtures .... since they are
> > dependend on eachother ...
> 
> I have done the test on a RISC PC with SA and RISC OS 4 with the
> following memory 16 Mb + 32 Mb + 2 Mb VRAM.

Almost the same, except that I have a 32+32 MB DRAM, more info at:
http://home.eunet.no/~kjetilbt/MyRiscPC/

> To do the test I had to alter the fastboot script because I do not want to
> install your testkernel as the new netbsd kernel, also do I have a
> different root device. Any way here is the changed fastboot script:
> 
> === START
> |Run <BtNetBSD$Dir>.native.mountufs ADFS 4
> Run <BtNetBSD$Dir>.PreBoot
> *Wimpslot 3000k
> Run <BtNetBSD$Dir>.BtNetBSD <BtNetBSD$Dir>.^.netbsd root=/dev/wd1a maxproc=64 nofpa
> === END

I also had to do that as I don't have a root device that is mountable
with UnixFS.

Also, I changed the root to /dev/sd1a.

> To see any output while the kernel was booting (that is after the press a
> key message I presume?) I had to change to the following screen mode:
> 1024 x 768 256 colours. The text appeared in a redish colour.

I can confirm that the text appeared in a redish colour, but it did work
fine on my HP A1097C monitor that normally only accepts 1280x1024. That
is excellent, as the old one did not work at all with this monitor.

> Now the real test result:
> 	The kernel stopped after the message: Swithing to new L1 page table
> 
> I had to reset the computer to get it back to life.

Confirmed.

The complete message on the redish screen was:
Kernel arg string (@0xf017a000) <BtNetBSD$Dir>.^.netbsd root=/dev/sd1a
maxproc=64 nofpa

Boot configuration structure reports the following memory
   DRAM block 0a at 10000000 size 01000000
   DRAM block 0b at 14000000 size 01000000
   DRAM block 1a at 18000000 size 01000000
   DRAM block 1b at 1c000000 size 01000000

   VRAM block 0 at 02000000 size 00200000

Allocating page tables
IRQ stack: p0x1019c000 v0xf019c000
ABT stack: p0x1019d000 v0xf019d000
UND stack: p0x1019e000 v0xf019e000
SVC stack: p0x1019f000 v0xf019f000

Creating L1 page table
Mapping kernel
Constructing L2 page tables
03400000 -> 034fffff @f6100000
03200000 -> 032fffff @f6000000
03000000 -> 030fffff @f6200000
Switching to new L1 page table

And then it hangs.

One thing you must be aware of when it comes to the StrongARM processors
is that they have a harvard cache, meaning a split between the
instruction and data cache. On the ARM6 and ARM7, you can construct a
program in the cache and then jump to it. That is not possible on a
StrongARM. Selfmodifying code was the biggest problem when the StrongARM
was introduced.

I hope this helps.

TIA!

Kjetil B.
mailto:kjetil@thomassen.priv.no
http://www.thomassen.priv.no/