Right.  I think I've got something approaching a conclusion:

Data abort and prefetch abort handlers will stay as they are (assembler
stub winding back tf_pc).

SWI handler will remain much as it is (assembler stub not winding back
tf_pc).  I may move extracting the comment field into the C code, though.

Undefined-instuction handler will change.  The assembler stub will stay
the same, but undefinedinstruction() will wind back tf_pc before calling
the relevant co-processor handler.  This will necessicate changes to
co-processor handlers, but the only one of those that currently looks at
the trapframe is DDB.


My reason for not having the assembler stubs for the SWI and undef handler
wind back tf_pc is that in order to do so, they need to know whether the
processor was in Thumb state (since the PC is advanced by one instruction,
rather than by a fixed number of bytes).  At the obvious point to do the
winding back, there are no spare registers to MRS into, so since the C
handlers will need to know what state the CPU was in anyway, they may as
well wind back tf_pc at the same time.

-- 
Ben Harris                                                   <bjh21@netbsd.org>
Portmaster, NetBSD/arm26               <URL:http://www.netbsd.org/Ports/arm26/>