In article <yf9wuk42wlq.fsf@mc.pp.se>
marcus@mc.pp.se wrote:

> > BTW, I have some questions about current G2_LOCK/UNLOCK implementation:
> > 
> > - In G2_LOCK, it uses _cpu_exception_suspend(), but shouldn't we
> >   use _cpu_intr_suspend() instead?
> 
> The call was initially disable_intr(), but was changed by uch to
> _cpu_exception_suspend().

I checked old disable_intr() in sh3/include/cpufunc.h,
but it was similar with current _cpu_exception_suspend().

> I don't know the definition of this macro,
> but the important thing is that the bus cycle which accesses the G2
> bus will not be interrupted.  An exception might interrupt the bus
> cycle just as an interrupt would, so it should be safest to diable
> both by setting the block bit in the status register.

Hmm, but is it really Ok to block all exceptions?
I don't think TLB miss or illegal instruction could be blocked.
(Then exception during _cpu_exception_suspend() would cause reboot?)

> > - In G2_UNLOCK, it implicitly pass zero to _cpu_exception_resume(),
> >   but shouldn't we restore returned value from the previous
> >   _cpu_exception_suspend() in G2_LOCK?
> 
> Probably.  As I said, I don't know the definition of these macros, but
> if exceptions were already disabled on entry to the bus_mem function,
> they should remain disabled upon exit.

The old enable_intr() didn't restore the previous SR.BL.
I guess uch just replaced both old macros with the new functions
which did the same things..
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp