On Mon, Apr 17, 2000 at 10:15:35PM -0400, Michael Richardson wrote:

 > #if 0      /* Cause a link error for bus_space_write_8 */ 
 > #define    bus_space_write_8     !!! bus_space_write_8 not implemented !!! 
 > #endif 
 >  
 >   will something like: 
 >        ((void)(*(volatile u_int64_t *)((h) + (o)) = (v))); 
 >  
 >   work? I realize that it may not be atomic. Are there Intel instructions 
 > for doing 64-bit I/O (I thought not). 

Not for 64-bit PIO, but maybe for 64-bit memory operations.  If so, then
those should be used to ensure an atomic bus transaction.

 >   My impression is that adjacent 32-bit writes should get coalesced into
 > a single 64-bit operation. 

I guess you have to ensure that the write buffer is flushed *before* you
attempt to coalesce (to make sure that the first write doesn't fill the
write buffer and cause it to drain).  Isn't this what the `wbinvd' insn
does?  Or am I confused?  (Gack, or is it "write back and invalidate
cache" ... I guess I'll have to look it up when I get to my office...)

-- 
        -- Jason R. Thorpe <thorpej@zembu.com>