Subject: Re: next try on 4G machine
To: None <hubert.feyrer@informatik.fh-regensburg.de>
From: Matthias Drochner <M.Drochner@fz-juelich.de>
List: port-i386
Date: 05/03/2000 12:12:00
feyrer@rfhs8012.fh-regensburg.de said:
> IC... Any takers? :)
Can you try the appended patch?
best regards
Matthias
Index: pchb.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/i386/pci/pchb.c,v
retrieving revision 1.17
diff -c -r1.17 pchb.c
*** pchb.c 1998/10/10 14:12:21 1.17
--- pchb.c 2000/05/03 10:09:41
***************
*** 187,192 ****
--- 187,193 ----
struct pcibus_attach_args pba;
pcireg_t bcreg;
u_char bdnum, pbnum;
+ pcitag_t tag;
printf("\n");
***************
*** 242,247 ****
--- 243,283 ----
I82424_CPU_BCTL_REG, bcreg);
printf("%s: disabled CPU-PCI write posting\n",
self->dv_xname);
+ }
+ break;
+ case PCI_PRODUCT_INTEL_82451NX_PXB:
+ pbnum = 0;
+ switch (pa->pa_device) {
+ case 18: /* PXB 0 bus A - primary bus */
+ break;
+ case 19: /* PXB 0 bus B */
+ /* read SUBA0 from MIOC */
+ tag = pci_make_tag(pa->pa_pc, 0, 16, 0);
+ bcreg = pci_conf_read(pa->pa_pc, tag, 0xd0);
+ pbnum = ((bcreg & 0x0000ff00) >> 8) + 1;
+ break;
+ case 20: /* PXB 1 bus A */
+ /* read BUSNO1 from MIOC */
+ tag = pci_make_tag(pa->pa_pc, 0, 16, 0);
+ bcreg = pci_conf_read(pa->pa_pc, tag, 0xd0);
+ pbnum = (bcreg & 0xff000000) >> 24;
+ break;
+ case 21: /* PXB 1 bus B */
+ /* read SUBA1 from MIOC */
+ tag = pci_make_tag(pa->pa_pc, 0, 16, 0);
+ bcreg = pci_conf_read(pa->pa_pc, tag, 0xd4);
+ pbnum = (bcreg & 0x000000ff) + 1;
+ break;
+ }
+ if (pbnum != 0) {
+ pba.pba_busname = "pci";
+ pba.pba_iot = pa->pa_iot;
+ pba.pba_memt = pa->pa_memt;
+ pba.pba_dmat = pa->pa_dmat;
+ pba.pba_bus = pbnum;
+ pba.pba_flags = pa->pa_flags;
+ pba.pba_pc = pa->pa_pc;
+ config_found(self, &pba, pchb_print);
}
break;
}