Subject: Re: AC97 auich and i82801BA
To: None <mark@mcs.vuw.ac.nz>
From: URA Hiroshi <ura@hiru.aoba.yokohama.jp>
List: port-i386
Date: 02/06/2002 00:47:04
>> Wed, 06 Feb 2002 01:39:02 +1300, Mark Davies <mark@mcs.vuw.ac.nz> said:
> Did that (see last paragraph below) but presumably if the AC97_ENAB_VRA isn't
> sticking that might effect how it behaves.
The Audio Codec '97 rev.2.2 (*) is written as follows:
VRA=1 enables Variable Rate Audio mode (VRA use sample ate control
Registers 2C-32h). Open reset,
When VRA is set to 0 the registers are forced to
BB80h(48kHz)
*) ftp://download.intel.com/ial/scalableplatforms/ac97r22.pdf
If sample rate is always set to 48kHz, it seems that it's right.
BTW, I beleive that checking extended id and setting sample rate
are moved from sys/dev/pci/{auich.c,auvia.c} to sys/dev/ic/ac97.c
like OpenBSD. Is this good idea? or not?
--
ura