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From: KIYOHARA Takashi <kiyohara@kk.iij4u.or.jp>
Date: Sun, 30 Nov 2003 01:25:27 +0900 (JST)

> Why doesn't PCI-Cardbus bridge Base address register setup at pciconf.c
> (sys/dev/pci/pciconf.c). A setup PCI-Cardbus base address register is
> omitted although PCI device & PCI-PCI bridge setup at pci_do_device_query().

no reason?


evbppc (OPENBLOCKS266) used pci_configure_bus() & had PCI-Cardbus bridge.
I wrote configuration patch at PCI-Cardbus bridge. I (& OPENBLOCKS266
user) wish to commit this code.

thanks
--
kiyohara


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Index: pciconf.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pciconf.c,v
retrieving revision 1.21
diff -c -r1.21 pciconf.c
*** pciconf.c	2003/03/31 21:04:40	1.21
--- pciconf.c	2003/12/01 15:46:38
***************
*** 78,83 ****
--- 78,84 ----
  #include <dev/pci/pcivar.h>
  #include <dev/pci/pciconf.h>
  #include <dev/pci/pcidevs.h>
+ #include <dev/pci/pccbbreg.h>
  
  int pci_conf_debug = 0;
  
***************
*** 427,435 ****
  {
  	pciconf_dev_t	*pd;
  	pciconf_win_t	*pi, *pm;
! 	pcireg_t	class, cmd, icr, bar, mask, bar64, mask64;
  	u_int64_t	size;
! 	int		br, width;
  
  	pd = &pb->device[pb->ndevs];
  	pd->pc = pb->pc;
--- 428,436 ----
  {
  	pciconf_dev_t	*pd;
  	pciconf_win_t	*pi, *pm;
! 	pcireg_t	class, cmd, icr, bhlc, bar, mask, bar64, mask64, busreg;
  	u_int64_t	size;
! 	int		br, width, reg_start, reg_end;
  
  	pd = &pb->device[pb->ndevs];
  	pd->pc = pb->pc;
***************
*** 456,467 ****
  	if ((cmd & PCI_STATUS_66MHZ_SUPPORT) == 0)
  		pb->freq_66 = 0;
  
! 	if (   (PCI_CLASS(class) == PCI_CLASS_BRIDGE)
! 	    && (PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_PCI)) {
  		pd->ppb = query_bus(pb, pd, dev);
  		if (pd->ppb == NULL)
  			return -1;
  		return 0;
  	}
  
  	icr = pci_conf_read(pb->pc, tag, PCI_INTERRUPT_REG);
--- 457,488 ----
  	if ((cmd & PCI_STATUS_66MHZ_SUPPORT) == 0)
  		pb->freq_66 = 0;
  
! 	bhlc = pci_conf_read(pb->pc, tag, PCI_BHLC_REG);
! 	switch (PCI_HDRTYPE_TYPE(bhlc)) {
! 	case PCI_HDRTYPE_DEVICE:
! 		reg_start = PCI_MAPREG_START;
! 		reg_end = PCI_MAPREG_END;
! 		break;
! 	case PCI_HDRTYPE_PPB:
  		pd->ppb = query_bus(pb, pd, dev);
  		if (pd->ppb == NULL)
  			return -1;
  		return 0;
+ 	case PCI_HDRTYPE_PCB:
+ 		reg_start = PCI_MAPREG_START;
+ 		reg_end = PCI_MAPREG_PCB_END;
+ 
+ 		busreg = pci_conf_read(pb->pc, tag, PCI_BUSNUM);
+ 		busreg  =  (busreg & 0xff000000) |
+ 		    pb->busno << PCI_BRIDGE_BUS_PRIMARY_SHIFT |
+ 		    pb->next_busno << PCI_BRIDGE_BUS_SECONDARY_SHIFT |
+ 		    pb->next_busno << PCI_BRIDGE_BUS_SUBORDINATE_SHIFT;
+ 		pci_conf_write(pb->pc, tag, PCI_BUSNUM, busreg);
+ 
+ 		pb->next_busno ++;
+ 		break;
+ 	default:
+ 		return -1;
  	}
  
  	icr = pci_conf_read(pb->pc, tag, PCI_INTERRUPT_REG);
***************
*** 489,495 ****
  	}
  
  	width = 4;
! 	for (br = PCI_MAPREG_START; br < PCI_MAPREG_END; br += width) {
  #if 0
  /* XXX Should only ignore if IDE not in legacy mode? */
  		if (PCI_CLASS(class) == PCI_CLASS_MASS_STORAGE &&
--- 510,516 ----
  	}
  
  	width = 4;
! 	for (br = reg_start; br < reg_end; br += width) {
  #if 0
  /* XXX Should only ignore if IDE not in legacy mode? */
  		if (PCI_CLASS(class) == PCI_CLASS_MASS_STORAGE &&
Index: pcireg.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pcireg.h,v
retrieving revision 1.43
diff -c -r1.43 pcireg.h
*** pcireg.h	2003/10/21 16:22:48	1.43
--- pcireg.h	2003/12/01 15:46:45
***************
*** 332,337 ****
--- 332,344 ----
  	     (((cacheline) & PCI_CACHELINE_MASK) << PCI_CACHELINE_SHIFT))
  
  /*
+  * PCI header type
+  */
+ #define PCI_HDRTYPE_DEVICE	0
+ #define PCI_HDRTYPE_PPB		1
+ #define PCI_HDRTYPE_PCB		2
+ 
+ /*
   * Mapping registers
   */
  #define	PCI_MAPREG_START		0x10

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