On Jul 5, 2005, at 9:56 PM, Erik E. Fair wrote:

> Here are proposed diffs to move the setup of microtime to use TSC
> until *after* CPU initialization, so that if TSC is shut off in
> identifycpu() (as it is for some chips), we don't go using TSC for
> microtime(9) on those platforms:

This patch looks good to me.

>
> *** sys/arch/i386/i386/cpu.c.orig    Sun Jun 19 14:34:44 2005
> --- sys/arch/i386/i386/cpu.c    Tue Jul  5 21:49:25 2005
> ***************
> *** 409,414 ****
> --- 409,424 ----
>       if (ci->ci_cpu_class >= CPUCLASS_486)
>           lcr0(rcr0() | CR0_WP);
>   #endif
> + #if defined(I586_CPU) || defined(I686_CPU)
> + #ifndef NO_TSC_TIME
> +     /*
> +      * On systems with a cycle counter, use that for
> +      * interval timing inbetween hz ticks in microtime(9)
> +      */
> +     if (cpu_feature & TSC)
> +         microtime_func = cc_microtime;
> + #endif
> + #endif
>   #if defined(I686_CPU)
>       /*
>        * On a P6 or above, enable global TLB caching if the
> *** sys/arch/i386/i386/identcpu.c.orig    Sun Jun 19 14:34:44 2005
> --- sys/arch/i386/i386/identcpu.c    Tue Jul  5 21:45:49 2005
> ***************
> *** 1198,1206 ****
>           last_tsc = rdtsc();
>           delay(100000);
>           ci->ci_tsc_freq = (rdtsc() - last_tsc) * 10;
> - #ifndef NO_TSC_TIME
> -         microtime_func = cc_microtime;
> - #endif
>       }
>       /* XXX end XXX */
>   #endif
> --- 1198,1203 ----
>
>
> Your comments would be appreciated.
>
>     Erik <fair@clock.org>
>

-- thorpej