Subject: Patches for i915 integrated graphics support
To: None <port-i386@NetBSD.org, tech-x11@netbsd.org>
From: Michael Eriksson <Michael.Eriksson@ericsson.com>
List: port-i386
Date: 12/10/2005 01:13:37
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Tjupp!

I have attached patches that gives agp(4) support for the Intel i915
integrated graphics device. With them, I get full X functionality on
the 1400x1050 screen of my i915GM-based HP nc6220 laptop, including
X-Video and hardware cursor. (There's still no support for an external
graphics device on the PCI Express Graphics Port.)

I'd be happy for any feedback. I'm planning to send-pr the patches,
but it would be good to have some more testing before that...

/Micke


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Index: arch/i386/pci/pchb.c
===================================================================
RCS file: /cvsroot/src/sys/arch/i386/pci/pchb.c,v
retrieving revision 1.55
diff -u -r1.55 pchb.c
--- arch/i386/pci/pchb.c	3 Feb 2005 21:35:44 -0000	1.55
+++ arch/i386/pci/pchb.c	9 Dec 2005 22:43:33 -0000
@@ -299,6 +299,8 @@
 		case PCI_PRODUCT_INTEL_82845G_DRAM:
 		case PCI_PRODUCT_INTEL_82855GM_MCH:
 		case PCI_PRODUCT_INTEL_82865_HB:
+		case PCI_PRODUCT_INTEL_82915G_HB:
+		case PCI_PRODUCT_INTEL_82915GM_HB:
 			/*
 			 * The host bridge is either in GFX mode (internal
 			 * graphics) or in AGP mode. In GFX mode, we pretend
Index: arch/i386/pci/pchb_rnd.c
===================================================================
RCS file: /cvsroot/src/sys/arch/i386/pci/pchb_rnd.c,v
retrieving revision 1.13
diff -u -r1.13 pchb_rnd.c
--- arch/i386/pci/pchb_rnd.c	6 Jul 2003 07:24:31 -0000	1.13
+++ arch/i386/pci/pchb_rnd.c	9 Dec 2005 22:43:34 -0000
@@ -75,6 +75,8 @@
 		case PCI_PRODUCT_INTEL_82860_HB:
 		case PCI_PRODUCT_INTEL_82865_HB:
 		case PCI_PRODUCT_INTEL_82875P_HB:
+		case PCI_PRODUCT_INTEL_82915G_HB:
+		case PCI_PRODUCT_INTEL_82915GM_HB:
 			sc->sc_st = pa->pa_memt;
 			if (bus_space_map(sc->sc_st, I82802_IOBASE,
 			    I82802_IOSIZE, 0, &sc->sc_sh) != 0) {
Index: dev/pci/agp.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agp.c,v
retrieving revision 1.34
diff -u -r1.34 agp.c
--- dev/pci/agp.c	27 Feb 2005 00:27:32 -0000	1.34
+++ dev/pci/agp.c	9 Dec 2005 22:43:35 -0000
@@ -161,6 +161,10 @@
 	  NULL,			agp_i810_attach },
 	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82865_HB,
 	  NULL,			agp_i810_attach },
+	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82915G_HB,
+	  NULL,			agp_i810_attach },
+	{ PCI_VENDOR_INTEL,	PCI_PRODUCT_INTEL_82915GM_HB,
+	  NULL,			agp_i810_attach },
 #endif
 
 #if NAGP_INTEL > 0
@@ -300,13 +304,13 @@
 }
 
 int
-agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc)
+agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg)
 {
 	/*
 	 * Find the aperture. Don't map it (yet), this would
 	 * eat KVA.
 	 */
-	if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, AGP_APBASE,
+	if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
 	    PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize,
 	    &sc->as_apflags) != 0)
 		return ENXIO;
Index: dev/pci/agp_ali.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agp_ali.c,v
retrieving revision 1.6
diff -u -r1.6 agp_ali.c
--- dev/pci/agp_ali.c	27 Feb 2005 00:27:32 -0000	1.6
+++ dev/pci/agp_ali.c	9 Dec 2005 22:43:36 -0000
@@ -93,7 +93,7 @@
 	sc->as_chipc = asc;
 	sc->as_methods = &agp_ali_methods;
 
-	if (agp_map_aperture(pa, sc) != 0) {
+	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
 		aprint_error(": failed to map aperture\n");
 		free(asc, M_AGP);
 		return ENXIO;
Index: dev/pci/agp_amd.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agp_amd.c,v
retrieving revision 1.11
diff -u -r1.11 agp_amd.c
--- dev/pci/agp_amd.c	27 Feb 2005 00:27:32 -0000	1.11
+++ dev/pci/agp_amd.c	9 Dec 2005 22:43:37 -0000
@@ -193,7 +193,7 @@
 		return error;
 	}
 
-	if (agp_map_aperture(pa, sc) != 0) {
+	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
 		aprint_error(": can't map aperture\n");
 		agp_generic_detach(sc);
 		free(asc, M_AGP);
Index: dev/pci/agp_i810.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agp_i810.c,v
retrieving revision 1.25
diff -u -r1.25 agp_i810.c
--- dev/pci/agp_i810.c	27 Feb 2005 00:27:32 -0000	1.25
+++ dev/pci/agp_i810.c	9 Dec 2005 22:43:38 -0000
@@ -58,10 +58,23 @@
 #define READ1(off)	bus_space_read_1(isc->bst, isc->bsh, off)
 #define READ4(off)	bus_space_read_4(isc->bst, isc->bsh, off)
 #define WRITE4(off,v)	bus_space_write_4(isc->bst, isc->bsh, off, v)
+#define WRITEGTT(off, v)						\
+	do {								\
+		if (isc->chiptype == CHIP_I915) {			\
+			bus_space_write_4(isc->gtt_bst, isc->gtt_bsh,	\
+			    (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4,	\
+			    (v));					\
+		} else {						\
+			WRITE4(AGP_I810_GTT +				\
+			    (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4,	\
+			    (v));					\
+		}							\
+	} while (0)
 
 #define CHIP_I810 0	/* i810/i815 */
 #define CHIP_I830 1	/* 830M/845G */
 #define CHIP_I855 2	/* 852GM/855GM/865G */
+#define CHIP_I915 3	/* 915G/915GM */
 
 struct agp_i810_softc {
 	u_int32_t initial_aperture;	/* aperture size at startup */
@@ -70,8 +83,10 @@
 	u_int32_t dcache_size;		/* i810 only */
 	u_int32_t stolen;		/* number of i830/845 gtt entries
 					   for stolen memory */
-	bus_space_tag_t bst;		/* bus_space tag */
-	bus_space_handle_t bsh;		/* bus_space handle */
+	bus_space_tag_t bst;		/* register bus_space tag */
+	bus_space_handle_t bsh;		/* register bus_space handle */
+	bus_space_tag_t gtt_bst;	/* GTT bus_space tag */
+	bus_space_handle_t gtt_bsh;	/* GTT bus_space handle */
 	struct pci_attach_args vga_pa;
 
 	void *sc_powerhook;
@@ -122,6 +137,8 @@
 	case PCI_PRODUCT_INTEL_82845G_IGD:
 	case PCI_PRODUCT_INTEL_82855GM_IGD:
 	case PCI_PRODUCT_INTEL_82865_IGD:
+	case PCI_PRODUCT_INTEL_82915G_IGD:
+	case PCI_PRODUCT_INTEL_82915GM_IGD:
 		return (1);
 	}
 
@@ -134,7 +151,7 @@
 	struct agp_softc *sc = (void *)self;
 	struct agp_i810_softc *isc;
 	struct agp_gatt *gatt;
-	int error;
+	int error, apbase;
 
 	isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO);
 	if (isc == NULL) {
@@ -164,13 +181,6 @@
 	/* XXXfvdl */
 	sc->as_dmat = isc->vga_pa.pa_dmat;
 
-	error = agp_map_aperture(&isc->vga_pa, sc);
-	if (error != 0) {
-		aprint_error(": can't map aperture\n");
-		free(isc, M_AGP);
-		return error;
-	}
-
 	switch (PCI_PRODUCT(isc->vga_pa.pa_id)) {
 	case PCI_PRODUCT_INTEL_82810_GC:
 	case PCI_PRODUCT_INTEL_82810_DC100_GC:
@@ -186,15 +196,47 @@
 	case PCI_PRODUCT_INTEL_82865_IGD:
 		isc->chiptype = CHIP_I855;
 		break;
+	case PCI_PRODUCT_INTEL_82915G_IGD:
+	case PCI_PRODUCT_INTEL_82915GM_IGD:
+		isc->chiptype = CHIP_I915;
+		break;
 	}
 
-	error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR,
-	    PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL);
+	apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR;
+	error = agp_map_aperture(&isc->vga_pa, sc, apbase);
 	if (error != 0) {
-		aprint_error(": can't map mmadr registers\n");
+		aprint_error(": can't map aperture\n");
+		free(isc, M_AGP);
 		return error;
 	}
 
+	if (isc->chiptype == CHIP_I915) {
+		error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR,
+		    PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL);
+		if (error != 0) {
+			aprint_error(": can't map mmadr registers\n");
+			agp_generic_detach(sc);
+			return error;
+		}
+		error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR,
+		    PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh,
+		    NULL, NULL);
+		if (error != 0) {
+			aprint_error(": can't map gttadr registers\n");
+			/* XXX we should release mmadr here */
+			agp_generic_detach(sc);
+			return error;
+		}
+	} else {
+		error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR,
+		    PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh, NULL, NULL);
+		if (error != 0) {
+			aprint_error(": can't map mmadr registers\n");
+			agp_generic_detach(sc);
+			return error;
+		}
+	}
+
 	isc->initial_aperture = AGP_GET_APERTURE(sc);
 
 	gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
@@ -265,7 +307,7 @@
 		WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
 
 		gatt->ag_physical = pgtblctl & ~1;
-	} else {	/* CHIP_I855 */
+	} else if (isc->chiptype == CHIP_I855) {
 		/* The 855GM automatically initializes the 128k gatt on boot. */
 		pcireg_t reg;
 		u_int32_t pgtblctl;
@@ -307,6 +349,42 @@
 		WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
 
 		gatt->ag_physical = pgtblctl & ~1;
+	} else {	/* CHIP_I915 */
+		/* The 915G automatically initializes the 256k gatt on boot. */
+		pcireg_t reg;
+		u_int32_t pgtblctl;
+		u_int16_t gcc1;
+
+		reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_GCC1);
+		gcc1 = (u_int16_t)(reg >> 16);
+		switch (gcc1 & AGP_I915_GCC1_GMS) {
+		case AGP_I915_GCC1_GMS_STOLEN_0M:
+			isc->stolen = 0;
+			break;
+		case AGP_I915_GCC1_GMS_STOLEN_1M:
+			isc->stolen = (1024 - 260) * 1024 / 4096;
+			break;
+		case AGP_I915_GCC1_GMS_STOLEN_8M:
+			isc->stolen = (8192 - 260) * 1024 / 4096;
+			break;
+		default:
+			isc->stolen = 0;
+			aprint_error(
+			    ": unknown memory configuration, disabling\n");
+			agp_generic_detach(sc);
+			return EINVAL;
+		}
+		if (isc->stolen > 0) {
+			aprint_error(": detected %dk stolen memory\n%s",
+			    isc->stolen * 4, sc->as_dev.dv_xname);
+		}
+
+		/* GATT address is already in there, make sure it's enabled */
+		pgtblctl = READ4(AGP_I810_PGTBL_CTL);
+		pgtblctl |= 1;
+		WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
+
+		gatt->ag_physical = pgtblctl & ~1;
 	}
 
 	/*
@@ -381,8 +459,17 @@
 			return 64 * 1024 * 1024;
 		else
 			return 128 * 1024 * 1024;
-	} else {	/* CHIP_I855 */
+	} else if (isc->chiptype == CHIP_I855) {
 		return 128 * 1024 * 1024;
+	} else {	/* CHIP_I915 */
+		u_int16_t msac;
+
+		reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC);
+		msac = (u_int16_t)(reg >> 16);
+		if (msac & AGP_I915_MSAC_APER_128M)
+			return 128 * 1024 * 1024;
+		else
+			return 256 * 1024 * 1024;
 	}
 }
 
@@ -416,7 +503,7 @@
 		reg &= 0x0000ffff;
 		reg |= ((pcireg_t)miscc) << 16;
 		pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg);
-	} if (isc->chiptype == CHIP_I830) {
+	} else if (isc->chiptype == CHIP_I830) {
 		u_int16_t gcc1;
 
 		if (aperture != (64 * 1024 * 1024) &&
@@ -436,8 +523,8 @@
 		reg &= 0x0000ffff;
 		reg |= ((pcireg_t)gcc1) << 16;
 		pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg);
-	} else {	/* CHIP_I855 */
-		if (aperture != 128 * 1024 * 1024) {
+	} else {	/* CHIP_I855 or CHIP_I915 */
+		if (aperture != agp_i810_get_aperture(sc)) {
 			printf("%s: bad aperture size %d\n",
 			    sc->as_dev.dv_xname, aperture);
 			return EINVAL;
@@ -471,8 +558,7 @@
 		}
 	}
 
-	WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4,
-	    physical | 1);
+	WRITEGTT(offset, physical | 1);
 	return 0;
 }
 
@@ -494,7 +580,7 @@
 		}
 	}
 
-	WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, 0);
+	WRITEGTT(offset, 0);
 	return 0;
 }
 
@@ -519,6 +605,10 @@
 	struct agp_i810_softc *isc = sc->as_chipc;
 	struct agp_memory *mem;
 
+#ifdef DEBUG
+	printf("AGP: alloc(%d, 0x%x)\n", type, (int) size);
+#endif
+
 	if ((size & (AGP_PAGE_SIZE - 1)) != 0)
 		return 0;
 
@@ -535,9 +625,9 @@
 			return 0;
 	} else if (type == 2) {
 		/*
-		 * Bogus mapping of a single page for the hardware cursor.
+		 * Bogus mapping for the hardware cursor.
 		 */
-		if (size != AGP_PAGE_SIZE)
+		if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE)
 			return 0;
 	}
 
@@ -550,7 +640,7 @@
 
 	if (type == 2) {
 		/*
-		 * Allocate and wire down the page now so that we can
+		 * Allocate and wire down the memory now so that we can
 		 * get its physical address.
 		 */
 		mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP,
@@ -566,6 +656,7 @@
 			free(mem, M_AGP);
 			return NULL;
 		}
+		memset(mem->am_virtual, 0, size);
 	} else if (type != 1) {
 		if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1,
 				      size, 0, BUS_DMA_NOWAIT,
@@ -621,8 +712,7 @@
 	}
 
 	if (mem->am_type == 2) {
-		WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4,
-		       mem->am_physical | 1);
+		WRITEGTT(offset, mem->am_physical | 1);
 		mem->am_offset = offset;
 		mem->am_is_bound = 1;
 		return 0;
@@ -634,10 +724,8 @@
 	if (isc->chiptype != CHIP_I810)
 		return EINVAL;
 
-	for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
-		WRITE4(AGP_I810_GTT + (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4,
-		       i | 3);
-	}
+	for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
+		WRITEGTT(offset, i | 3);
 	mem->am_is_bound = 1;
 	return 0;
 }
@@ -649,9 +737,7 @@
 	u_int32_t i;
 
 	if (mem->am_type == 2) {
-		WRITE4(AGP_I810_GTT +
-		       (u_int32_t)(mem->am_offset >> AGP_PAGE_SHIFT) * 4,
-		       0);
+		WRITEGTT(mem->am_offset, 0);
 		mem->am_offset = 0;
 		mem->am_is_bound = 0;
 		return 0;
@@ -664,7 +750,7 @@
 		return EINVAL;
 
 	for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
-		WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
+		WRITEGTT(i, 0);
 	mem->am_is_bound = 0;
 	return 0;
 }
Index: dev/pci/agp_intel.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agp_intel.c,v
retrieving revision 1.14
diff -u -r1.14 agp_intel.c
--- dev/pci/agp_intel.c	26 Aug 2003 18:43:54 -0000	1.14
+++ dev/pci/agp_intel.c	9 Dec 2005 22:43:39 -0000
@@ -132,7 +132,7 @@
 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
 	    NULL);
 
-	if (agp_map_aperture(pa, sc) != 0) {
+	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
 		aprint_error(": can't map aperture\n");
 		free(isc, M_AGP);
 		sc->as_chipc = NULL;
Index: dev/pci/agp_sis.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agp_sis.c,v
retrieving revision 1.5
diff -u -r1.5 agp_sis.c
--- dev/pci/agp_sis.c	27 Feb 2005 00:27:32 -0000	1.5
+++ dev/pci/agp_sis.c	9 Dec 2005 22:43:40 -0000
@@ -93,7 +93,7 @@
 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
 	    NULL);
 
-	if (agp_map_aperture(pa, sc) != 0) {
+	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
 		aprint_error(": can't map aperture\n");
 		free(ssc, M_AGP);
 		return ENXIO;
Index: dev/pci/agp_via.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agp_via.c,v
retrieving revision 1.6
diff -u -r1.6 agp_via.c
--- dev/pci/agp_via.c	27 Feb 2005 00:27:32 -0000	1.6
+++ dev/pci/agp_via.c	9 Dec 2005 22:43:41 -0000
@@ -92,7 +92,7 @@
 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
 	    NULL);
 
-	if (agp_map_aperture(pa, sc) != 0) {
+	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
 		aprint_error(": can't map aperture\n");
 		free(asc, M_AGP);
 		return ENXIO;
Index: dev/pci/agpreg.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agpreg.h,v
retrieving revision 1.8
diff -u -r1.8 agpreg.h
--- dev/pci/agpreg.h	27 Feb 2005 00:27:32 -0000	1.8
+++ dev/pci/agpreg.h	9 Dec 2005 22:43:42 -0000
@@ -205,4 +205,18 @@
 #define AGP_I855_GCC1_GMS_STOLEN_16M	0x40
 #define AGP_I855_GCC1_GMS_STOLEN_32M	0x50
 
+/*
+ * Config registers for 915G/915GM
+ */
+#define AGP_I915_MMADR			0x10
+#define AGP_I915_GMADR			0x18
+#define AGP_I915_GTTADR			0x1c
+#define AGP_I915_GCC1			0x52
+#define 	AGP_I915_GCC1_GMS		0x70
+#define 	AGP_I915_GCC1_GMS_STOLEN_0M	0x00
+#define 	AGP_I915_GCC1_GMS_STOLEN_1M	0x10
+#define 	AGP_I915_GCC1_GMS_STOLEN_8M	0x30
+#define AGP_I915_MSAC			0x62
+#define 	AGP_I915_MSAC_APER_128M		0x02
+
 #endif /* !_PCI_AGPREG_H_ */
Index: dev/pci/agpvar.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/agpvar.h,v
retrieving revision 1.9
diff -u -r1.9 agpvar.h
--- dev/pci/agpvar.h	27 Feb 2005 00:27:32 -0000	1.9
+++ dev/pci/agpvar.h	9 Dec 2005 22:43:43 -0000
@@ -170,7 +170,7 @@
  */
 void agp_flush_cache(void);
 int agp_find_caps(pci_chipset_tag_t, pcitag_t);
-int agp_map_aperture(struct pci_attach_args *, struct agp_softc *);
+int agp_map_aperture(struct pci_attach_args *, struct agp_softc *, int);
 struct agp_gatt *agp_alloc_gatt(struct agp_softc *);
 void agp_free_gatt(struct agp_softc *, struct agp_gatt *);
 int agp_generic_attach(struct agp_softc *);
Index: dev/pci/pcidevs
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pcidevs,v
retrieving revision 1.701.2.14
diff -u -r1.701.2.14 pcidevs
--- dev/pci/pcidevs	8 Sep 2005 21:22:15 -0000	1.701.2.14
+++ dev/pci/pcidevs	9 Dec 2005 22:43:46 -0000
@@ -1296,6 +1296,7 @@
 product COMPAQ DPNet100TX	0xae40	Dual Port Netelligent 10/100 TX
 product COMPAQ IntPL100TX	0xae43	ProLiant Integrated Netelligent 10/100 TX
 product COMPAQ DP4000		0xb011	Deskpro 4000 5233MMX
+product COMPAQ PRESARIO56XX	0xb0b8	Presario 56xx
 product COMPAQ M700		0xb112	Armada M700
 product COMPAQ NF3P_BNC		0xf150	NetFlex 3/P w/ BNC
 product COMPAQ NF3P		0xf130	NetFlex 3/P
@@ -1820,11 +1821,14 @@
 product INTEL 82875P_HB		0x2578	82875P Host
 product INTEL 82875P_AGP	0x2579	82875P AGP
 product INTEL 82875P_CSA	0x257b	82875P PCI-CSA Bridge
-product INTEL 82915P_HB		0x2580	82915P/G/GL Host
-product INTEL 82915P_EXP	0x2581	82915P/G/GL PCI Express Bridge
+product INTEL 82915G_HB		0x2580	82915P/G/GL Host
+product INTEL 82915G_PEG	0x2581	82915P/G/GL PCI Express Graphics Port
 product INTEL 82915G_IGD	0x2582	82915G/GL Integrated Graphics Device
 product INTEL 82925X_HB		0x2584	82925X Host
-product INTEL 82925X_EXP	0x2585	82925X PCI Express Bridge
+product INTEL 82925X_PEG	0x2585	82925X PCI Express Graphics Port
+product INTEL 82915GM_HB	0x2590	82915PM/GM/GMS Host
+product INTEL 82915GM_PEG	0x2591	82915PM/GM PCI Express Graphics Port
+product INTEL 82915GM_IGD	0x2592	82915GM/GMS Integrated Graphics Device
 product INTEL 6300ESB_LPC	0x25a1	6300ESB LPC Interface Bridge
 product INTEL 6300ESB_IDE	0x25a2	6300ESB IDE Controller
 product INTEL 6300ESB_SATA	0x25a3	6300ESB SATA Controller
@@ -1855,6 +1859,7 @@
 product INTEL 82801FB_AC	0x266e	82801FB/FR AC'97 Audio Controller
 product INTEL 82801FB_IDE	0x266f	82801FB/FR IDE Controller
 product INTEL 82915G_IGDC	0x2782	82915G/GL IGD Companion
+product INTEL 82915GM_IGDC	0x2792	82915GM/GMS IGD Companion
 product INTEL 82801G_LPC	0x27b8	82801GB/GR LPC Interface Bridge
 product INTEL 82801G_IDE	0x27df	82801GB/GR IDE Controller
 product INTEL 82801G_SATA	0x27c0	82801GB/GR SATA Controller
Index: dev/pci/pcidevs.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pcidevs.h,v
retrieving revision 1.702.2.14
diff -u -r1.702.2.14 pcidevs.h
--- dev/pci/pcidevs.h	8 Sep 2005 21:23:03 -0000	1.702.2.14
+++ dev/pci/pcidevs.h	9 Dec 2005 22:43:48 -0000
@@ -1,4 +1,4 @@
-/*	$NetBSD: pcidevs.h,v 1.702.2.14 2005/09/08 21:23:03 tron Exp $	*/
+/*	$NetBSD$	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
@@ -1303,6 +1303,7 @@
 #define	PCI_PRODUCT_COMPAQ_DPNet100TX	0xae40		/* Dual Port Netelligent 10/100 TX */
 #define	PCI_PRODUCT_COMPAQ_IntPL100TX	0xae43		/* ProLiant Integrated Netelligent 10/100 TX */
 #define	PCI_PRODUCT_COMPAQ_DP4000	0xb011		/* Deskpro 4000 5233MMX */
+#define	PCI_PRODUCT_COMPAQ_PRESARIO56XX	0xb0b8		/* Presario 56xx */
 #define	PCI_PRODUCT_COMPAQ_M700	0xb112		/* Armada M700 */
 #define	PCI_PRODUCT_COMPAQ_NF3P_BNC	0xf150		/* NetFlex 3/P w/ BNC */
 #define	PCI_PRODUCT_COMPAQ_NF3P	0xf130		/* NetFlex 3/P */
@@ -1827,11 +1828,14 @@
 #define	PCI_PRODUCT_INTEL_82875P_HB	0x2578		/* 82875P Host */
 #define	PCI_PRODUCT_INTEL_82875P_AGP	0x2579		/* 82875P AGP */
 #define	PCI_PRODUCT_INTEL_82875P_CSA	0x257b		/* 82875P PCI-CSA Bridge */
-#define	PCI_PRODUCT_INTEL_82915P_HB	0x2580		/* 82915P/G/GL Host */
-#define	PCI_PRODUCT_INTEL_82915P_EXP	0x2581		/* 82915P/G/GL PCI Express Bridge */
+#define	PCI_PRODUCT_INTEL_82915G_HB	0x2580		/* 82915P/G/GL Host */
+#define	PCI_PRODUCT_INTEL_82915G_PEG	0x2581		/* 82915P/G/GL PCI Express Graphics Port */
 #define	PCI_PRODUCT_INTEL_82915G_IGD	0x2582		/* 82915G/GL Integrated Graphics Device */
 #define	PCI_PRODUCT_INTEL_82925X_HB	0x2584		/* 82925X Host */
-#define	PCI_PRODUCT_INTEL_82925X_EXP	0x2585		/* 82925X PCI Express Bridge */
+#define	PCI_PRODUCT_INTEL_82925X_PEG	0x2585		/* 82925X PCI Express Graphics Port */
+#define	PCI_PRODUCT_INTEL_82915GM_HB	0x2590		/* 82915PM/GM/GMS Host */
+#define	PCI_PRODUCT_INTEL_82915GM_PEG	0x2591		/* 82915PM/GM PCI Express Graphics Port */
+#define	PCI_PRODUCT_INTEL_82915GM_IGD	0x2592		/* 82915GM/GMS Integrated Graphics Device */
 #define	PCI_PRODUCT_INTEL_6300ESB_LPC	0x25a1		/* 6300ESB LPC Interface Bridge */
 #define	PCI_PRODUCT_INTEL_6300ESB_IDE	0x25a2		/* 6300ESB IDE Controller */
 #define	PCI_PRODUCT_INTEL_6300ESB_SATA	0x25a3		/* 6300ESB SATA Controller */
@@ -1862,6 +1866,7 @@
 #define	PCI_PRODUCT_INTEL_82801FB_AC	0x266e		/* 82801FB/FR AC'97 Audio Controller */
 #define	PCI_PRODUCT_INTEL_82801FB_IDE	0x266f		/* 82801FB/FR IDE Controller */
 #define	PCI_PRODUCT_INTEL_82915G_IGDC	0x2782		/* 82915G/GL IGD Companion */
+#define	PCI_PRODUCT_INTEL_82915GM_IGDC	0x2792		/* 82915GM/GMS IGD Companion */
 #define	PCI_PRODUCT_INTEL_82801G_LPC	0x27b8		/* 82801GB/GR LPC Interface Bridge */
 #define	PCI_PRODUCT_INTEL_82801G_IDE	0x27df		/* 82801GB/GR IDE Controller */
 #define	PCI_PRODUCT_INTEL_82801G_SATA	0x27c0		/* 82801GB/GR SATA Controller */
Index: dev/pci/pcidevs_data.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pcidevs_data.h,v
retrieving revision 1.700.2.14
diff -u -r1.700.2.14 pcidevs_data.h
--- dev/pci/pcidevs_data.h	8 Sep 2005 21:23:03 -0000	1.700.2.14
+++ dev/pci/pcidevs_data.h	9 Dec 2005 22:43:51 -0000
@@ -1,4 +1,4 @@
-/*	$NetBSD: pcidevs_data.h,v 1.700.2.14 2005/09/08 21:23:03 tron Exp $	*/
+/*	$NetBSD$	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
@@ -4536,6 +4536,10 @@
 	    "Deskpro 4000 5233MMX",
 	},
 	{
+	    PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_PRESARIO56XX,
+	    "Presario 56xx",
+	},
+	{
 	    PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_M700,
 	    "Armada M700",
 	},
@@ -6212,12 +6216,12 @@
 	    "82875P PCI-CSA Bridge",
 	},
 	{
-	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915P_HB,
+	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB,
 	    "82915P/G/GL Host",
 	},
 	{
-	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915P_EXP,
-	    "82915P/G/GL PCI Express Bridge",
+	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_PEG,
+	    "82915P/G/GL PCI Express Graphics Port",
 	},
 	{
 	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_IGD,
@@ -6228,8 +6232,20 @@
 	    "82925X Host",
 	},
 	{
-	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82925X_EXP,
-	    "82925X PCI Express Bridge",
+	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82925X_PEG,
+	    "82925X PCI Express Graphics Port",
+	},
+	{
+	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB,
+	    "82915PM/GM/GMS Host",
+	},
+	{
+	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_PEG,
+	    "82915PM/GM PCI Express Graphics Port",
+	},
+	{
+	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGD,
+	    "82915GM/GMS Integrated Graphics Device",
 	},
 	{
 	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_LPC,
@@ -6352,6 +6368,10 @@
 	    "82915G/GL IGD Companion",
 	},
 	{
+	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGDC,
+	    "82915GM/GMS IGD Companion",
+	},
+	{
 	    PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_LPC,
 	    "82801GB/GR LPC Interface Bridge",
 	},
@@ -10276,4 +10296,4 @@
 	    "Video Controller",
 	},
 };
-const int pci_nproducts = 1990;
+const int pci_nproducts = 1995;

--w6U8BorVlG--