Re: SPL NOT ZERO ON SYSCALL ENTRY

[Matthias Drochner <M.Drochner%fz-juelich.de@localhost>]

ad%NetBSD.org@localhost said:
> I also suspect it's some corner case or race condition with the soft
> interrupt code. 

I've got a nice DDB stacktrace which also points into
that direction.
Another observation is that the CPU which does not
lower the SPL on syscall exit is always CPU 1.
(Softints run always on CPU 0, right?)

CPU0:
mutex_spin_enter()
sched_pstats()
callout_softclock()
softint_execute()
softint_dispatch()

CPU1:
(Breakpoint after the "spl not lowered" printf)
Xsyscall

best regards
Matthias




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