Re: Two SpeedStep issues

[mlelstv%serpens.de@localhost (Michael van Elst)]

denbrok%uni-bonn.de@localhost writes:

>One is equipped with a Core2Duo E8200. NetBSD reports 800 700 600
>as the frequencies available. I think this should be 2666, 2333
>and 2000 or similar. I don't know whether this makes a practical
>difference, but it irritates me a little.

That's probably correct. The speedstep frequency parameter is
scaled by the bus clock and it is likely that the driver does
not identify this correctly. If you build the kernel with
options EST_DEBUG you will get some information about the
data found.

However, this shouldn't affect how EST works. Configuring
800, 700 or 600 should result in real clock values of 2666,
2333 and 2000 respectively.



>The other one, a ThinkPad R50e, is equipped with a Celeron M 1400.
>I didn't really expect it to have SpeedStep support at all, but
>OpenBSD (in practice) claims to lower its frequency to as low as
>367 MHz, claiming the battery would then last about 6 hours.

Celeron M was used for many different CPUs. What does the
kernel (or cpuctl identify) say? Enhanced SpeedStep is
signaled with the EST flag in the features2 register.

If the there is the EST flag but the est driver doesn't
recognize SpeedStep then it is because the CPU reports
minimum and maximum clocks to be the same. This is
Intels way to say: don't play with it but use the
power saving features of ACPI where we have hidden
the details.

Unfortunately we don't support he ACPI power saving
features yet.


If you want to play yourself with the EST driver,
sys/arch/x86/x86/est.c is it :)

-- 
-- 
                                Michael van Elst
Internet: mlelstv%serpens.de@localhost
                                "A potential Snark may lurk in every tree."