I found that, when trying to build for `options M68030' only, that the
DC[FP][LP]() macros in _bus_dmamap_sync() -- data cache
{flush,purge}{line,page} -- are undefined for the M68020 only and
M68030 only cases. Worse, much worse, in the _MULTI_CPU case, it
indeed compiles, but it looks like the M68040 instruction will always
be executed on the lesser processors.

Could this account for an apparent FPU exception being taken in the
kernel:

  http://mail-index.netbsd.org/port-mac68k/2002/05/29/0008.html

or must there be still another problem?

In the following patch, I went ahead and filled in all the blanks with
macros that expand to nothing (to preserve parallelism and prevent
such problems in the future). Does this look OK? Does it need another
comment: something to the effect, "68020 has no data cache, 68030's is
write-through"?


Index: include/cacheops.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/m68k/include/cacheops.h,v
retrieving revision 1.8
diff -u -r1.8 cacheops.h
--- include/cacheops.h	2000/04/05 19:38:33	1.8
+++ include/cacheops.h	2002/06/01 02:18:32
@@ -61,6 +61,14 @@
 #define	DCIU()		DCIU_20()
 #define	DCIAS(pa)	DCIAS_20((pa))
 #define	PCIA()		PCIA_20()
+#define	DCFA()		DCFA_20()
+#define	ICPL(pa)	ICPL_20((pa))
+#define	ICPP(pa)	ICPP_20((pa))
+#define	DCPL(pa)	DCPL_20((pa))
+#define	DCPP(pa)	DCPP_20((pa))
+#define	DCPA()		DCPA_20()
+#define	DCFL(pa)	DCFL_20((pa))
+#define	DCFP(pa)	DCFP_20((pa))

 #elif defined(M68030) && !(defined(M68020)||defined(M68040)||defined(M68060))

@@ -75,6 +83,14 @@
 #define	DCIU()		DCIU_30()
 #define	DCIAS(pa)	DCIAS_30((pa))
 #define	PCIA()		PCIA_30()
+#define	DCFA()		DCFA_30()
+#define	ICPL(pa)	ICPL_30((pa))
+#define	ICPP(pa)	ICPP_30((pa))
+#define	DCPL(pa)	DCPL_30((pa))
+#define	DCPP(pa)	DCPP_30((pa))
+#define	DCPA()		DCPA_30()
+#define	DCFL(pa)	DCFL_30((pa))
+#define	DCFP(pa)	DCFP_30((pa))

 #elif defined(M68040) && !(defined(M68020)||defined(M68030)||defined(M68060))

@@ -138,6 +154,14 @@
 void	_DCIU __P((void));
 void	_DCIAS __P((paddr_t));
 void	_PCIA __P((void));
+void	_DCFA __P((void));
+void	_ICPL __P((paddr_t));
+void	_ICPP __P((paddr_t));
+void	_DCPL __P((paddr_t));
+void	_DCPP __P((paddr_t));
+void	_DCPA __P((void));
+void	_DCFL __P((paddr_t));
+void	_DCFP __P((paddr_t));

 #define	TBIA()		_TBIA()
 #define	TBIS(va)	_TBIS((va))
@@ -150,18 +174,6 @@
 #define	DCIU()		_DCIU()
 #define	DCIAS(pa)	_DCIAS((pa))
 #define	PCIA()		_PCIA()
-
-#if defined(M68040)||defined(M68060)
-
-void	_DCFA __P((void));
-void	_ICPL __P((paddr_t));
-void	_ICPP __P((paddr_t));
-void	_DCPL __P((paddr_t));
-void	_DCPP __P((paddr_t));
-void	_DCPA __P((void));
-void	_DCFL __P((paddr_t));
-void	_DCFP __P((paddr_t));
-
 #define	DCFA()		_DCFA()
 #define	ICPL(pa)	_ICPL((pa))
 #define	ICPP(pa)	_ICPP((pa))
@@ -170,8 +182,6 @@
 #define	DCPA()		_DCPA()
 #define	DCFL(pa)	_DCFL((pa))
 #define	DCFP(pa)	_DCFP((pa))
-
-#endif /* defined(M68040)||defined(M68060) */

 #endif

Index: include/cacheops_20.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/m68k/include/cacheops_20.h,v
retrieving revision 1.5
diff -u -r1.5 cacheops_20.h
--- include/cacheops_20.h	1999/11/06 17:42:31	1.5
+++ include/cacheops_20.h	2002/06/01 02:18:32
@@ -107,7 +107,13 @@
 #define	DCIU_20()
 #define	DCIAS_20(va)
 #define	DCFA_20()
+#define	ICPL_20(va)
+#define	ICPP_20(va)
+#define	DCPL_20(va)
+#define	DCPP_20(va)
 #define	DCPA_20()
+#define	DCFL_20(va)
+#define	DCFP_20(va)

 void PCIA_20 __P((void));
 extern __inline void
Index: include/cacheops_30.h
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/m68k/include/cacheops_30.h,v
retrieving revision 1.5
diff -u -r1.5 cacheops_30.h
--- include/cacheops_30.h	1999/11/06 17:42:32	1.5
+++ include/cacheops_30.h	2002/06/01 02:18:32
@@ -112,7 +112,13 @@
 #define	DCIU_30()
 #define	DCIAS_30(va)
 #define	DCFA_30()
+#define	ICPL_30(va)
+#define	ICPP_30(va)
+#define	DCPL_30(va)
+#define	DCPP_30(va)
 #define	DCPA_30()
+#define	DCFL_30(va)
+#define	DCFP_30(va)


 void PCIA_30 __P((void));
Index: m68k/cacheops.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/m68k/m68k/cacheops.c,v
retrieving revision 1.6
diff -u -r1.6 cacheops.c
--- m68k/cacheops.c	2000/04/15 20:31:27	1.6
+++ m68k/cacheops.c	2002/06/01 02:18:33
@@ -287,10 +287,19 @@
 	}
 }

-#if defined(M68040) || defined(M68060)
 void _DCFA()
 {
 	switch (cputype) {
+#ifdef M68020
+	case CPU_68020:
+		DCFA_20();
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		DCFA_30();
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		DCFA_40();
@@ -303,7 +312,6 @@
 #endif
 	}
 }
-#endif /* M68040 || M68060 */

 void _TBIS(va)
 	vaddr_t	va;
@@ -361,11 +369,20 @@
 	}
 }

-#if defined(M68040) || defined(M68060)
 void _DCPA()
 {
 	switch (cputype) {
 	default:
+#ifdef M68020
+	case CPU_68020:
+		DCPA_20();
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		DCPA_30();
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		DCPA_40();
@@ -384,6 +401,16 @@
 {
 	switch (cputype) {
 	default:
+#ifdef M68020
+	case CPU_68020:
+		ICPL_20(pa);
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		ICPL_30(pa);
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		ICPL_40(pa);
@@ -402,6 +429,16 @@
 {
 	switch (cputype) {
 	default:
+#ifdef M68020
+	case CPU_68020:
+		ICPP_20(pa);
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		ICPP_30(pa);
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		ICPP_40(pa);
@@ -420,6 +457,16 @@
 {
 	switch (cputype) {
 	default:
+#ifdef M68020
+	case CPU_68020:
+		DCPL_20(pa);
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		DCPL_30(pa);
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		DCPL_40(pa);
@@ -438,6 +485,16 @@
 {
 	switch (cputype) {
 	default:
+#ifdef M68020
+	case CPU_68020:
+		DCPP_20(pa);
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		DCPP_30(pa);
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		DCPP_40(pa);
@@ -456,6 +513,16 @@
 {
 	switch (cputype) {
 	default:
+#ifdef M68020
+	case CPU_68020:
+		DCFL_20(pa);
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		DCFL_30(pa);
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		DCFL_40(pa);
@@ -474,6 +541,16 @@
 {
 	switch (cputype) {
 	default:
+#ifdef M68020
+	case CPU_68020:
+		DCFP_20(pa);
+		break;
+#endif
+#ifdef M68030
+	case CPU_68030:
+		DCFP_30(pa);
+		break;
+#endif
 #ifdef M68040
 	case CPU_68040:
 		DCFP_40(pa);
@@ -486,6 +563,5 @@
 #endif
 	}
 }
-#endif /* M68040 || M68060 */

 #endif /* defined(_MULTI_CPU) */

Frederick