On Wed, 6 Aug 1997, Bill Studenmund wrote:

> > Doh!
> 
> Doh! I knew the II did. I guess the IIx does too.
> 
> > I just checked, and apparently the II and IIx require special SIMM's, and
> > there might not be any 2MB SIMM's for those machines...oh well.
> 
> I think you're right about 2 MB SIMMS. Go for 4MB SIMMS (and have 20).
> 
> For a II, you have to put 4 MB in slot A, and the 16 in slot B; the ROM
> won't deal with 16 MB in slot A.
> 
> You'll then need PAL SIMMs. PAL is Programmable Array Logic, a cheep form
> of programmable circuitry.
> 
> The reason is that after the II came out (and evidently the IIx), the 4 MB
> DRAM spec was changed to have a write durring a refresh cycle initiate
> an on-chip memory test. The II didn't take this into account, and the Cpu
> could write to I/O memory while the memory controller refreshed, initiating
> a selftest after boot. Quite nasty. The PAL contains circuitry to make sure
> all refresh cycles look like reads to the chips.

Interesting.  Does this apply to use of 4 MB 30-pin SIMMs in an SE/30?  I
would love to upgrade mine, but heard rumours that "standard" 4Mx8 modules
didn't work.  If special SIMMs _are_ needed, who carries such a thing?

Steve