At 02:07 AM 7/2/98 , Colin Wood wrote:
>
>
>I-Jong Lin wrote:
>> Dear Wunder-kind Kernel Hackers,
>> 
>> What does MMUITTO32, MMUDTTO32, MMUITT1, MMUDTT1 stand for and what do
>> these values do? 
>> 
>
>Where do you see these values?
>
>-- 
>Colin Wood                                 cwood@ichips.intel.com
>Component Design Engineer - PMD                 Intel Corporation
>-----------------------------------------------------------------
>I speak only on my own behalf, not for my employer.

I don't know where you see these, my guess would be somewhere in the pmap
code because these look like acronyms for the Memory Management Unit
Instruction/Data Transparent Translation registers 1 and 2.  These are
registers on the Motorola 68040 and 68060 MMUs that allow you to set up
special mappings that translate virtual (Motorola calls these logical)
addresses directly to physical addresses.  This means that the physical
address generated when a virtual address matches the TTx registers is the
same as the virtual address.  This effect can be had using the page tables
by making the physical address that a virtual address maps to be the same
as that virtual address. These are good if you want to map say a frame
buffer directly into a process or set up the kernel VM space to use
physical addresses.  The advantage is that the page tables on not searched
when these registers match a virtual address, and the address translation
cache (aka TLB) is not disturbed.  The 68030 also has Transparent
Translation registers but not seperate ones for the data and isntruction
stream.
--------
Christopher R. Bowman
crb@ChrisBowman.com
http://www.ChrisBowman.com/~crb