I just realized I replied to this with port-mac68k copied, but I forgot to
restore the entire quoted text. Here's the original message from port-i386.

Todd Whitesel
toddpw @ best.com

----- Forwarded message from Gregory McGarry -----

From port-i386-owner-toddpw=best.com@netbsd.org Thu Feb  3 14:54:51 2000
Date: Fri, 04 Feb 2000 08:44:26 +1000
From: Gregory McGarry <g.mcgarry@qut.edu.au>
Subject: Interrupt Despatching
To: port-i386@netbsd.org
Message-id: <20000204084426.A1842@lux.sprc.qut.edu.au>
Organization: Signal Processing Research Centre
Sender: port-i386-owner@netbsd.org

Currently the interrupt despatching mechanism in NetBSD/i386 is very
dependent on the i8259 interrupt controller.  It would be great to
remove this dependence, particularly in the case of symmetric I/O (SMP).

An MI interrupt despatching mechanism which interfaced to ICU-dependent
drivers looks like the way to go.  This approach doesn't look like
a big issue, except perhaps an increased latency.

What is confusing, is how to handle spl levels.  How many IRQs can be
expected to be supported this way?

Does anyone have any comments/ideas on the subject?

	-- Gregory McGarry <g.mcgarry@qut.edu.au>

----- End of forwarded message from Gregory McGarry -----