Re: G3 upgrade L2 cache

[der Mouse <mouse%Rodents-Montreal.ORG@localhost>]

>> I'm beginning to wonder if this card has fried cache, or maybe the
>> clock divisor of 2:1 [...] is wrong for this card.

I don't know what's different, but I now find that

options         L2CR_CONFIG="(L2SIZ_512K|L2CLK_20|L2RAM_PIPELINE_BURST)"

not only boots and runs, but runs significantly faster.  I did a
rudimentary test designed to be moderately memory-intensive (copy my
tar source, 302213 bytes long, to an mfs, and "time cc ..." to compile
it there).  I did this 18 times, 9 with each kernel.  To avoid ordering
biases, I took 16 bits from /dev/urandom on another machine, appended
two 1 bits so as to have equal numbers of 0 and 1 bits, and used the
result (100010110100010111) as the order in which to run the tests.  I
ran the tests by, for each test, doing an OF reset-all, then
"boot scsi-int/sd@0:0 /netbsd -s" (or .../netbsdN -s for the new
kernel), RETURN when prompted for shell, then "sh /zz" (/zz being a
script which did mount_mfs, cd, cp, time cc (in particular, exactly the
same commands each time).  There are plenty of other variables, most of
which I flatly refuse to believe are relevant (eg, exactly which part
of Bach's Brandenburg Concerti I happened to be listening to at the
time); the results show a basically perfect correlation of the output
from time with which kernel I used.  The only even vaguely plausible
way I can think of that this could come about other than cache effects
is the exact OF command used to boot the system (especially its
length), and even that I find extremely implausible.  So I think this
setting really is working.

no L2CR_CONFIG:
       21.41 real        14.45 user         2.02 sys
       21.39 real        14.46 user         2.02 sys
       21.38 real        14.72 user         1.74 sys
       21.36 real        14.47 user         1.99 sys
       21.37 real        14.33 user         2.14 sys
       21.36 real        14.49 user         1.97 sys
       21.42 real        14.62 user         1.86 sys
       21.43 real        14.62 user         1.90 sys
       21.36 real        14.36 user         2.08 sys

L2CR_CONFIG set as above:
       16.57 real        10.75 user         1.13 sys
       16.53 real        10.67 user         1.19 sys
       16.53 real        10.63 user         1.20 sys
       16.54 real        10.61 user         1.20 sys
       16.55 real        10.85 user         1.04 sys
       16.53 real        10.75 user         1.09 sys
       16.54 real        10.60 user         1.27 sys
       16.55 real        10.62 user         1.25 sys
       16.53 real        10.57 user         1.25 sys

Oddly enough, in view of Oskar's experience, it didn't work when set to
write-through.  However, when I tried this same setting earlier, I'm
_sure_ I saw it report "L2 cache present but not enabled" - indeed, it
was so surprising I tried it twice to make sure I booted the correct
kernel - but now I'm getting "no-parity 512KB WB L2 cache (PB SRAM) at
2:1 ratio".  So there is definitely something mysterious.

However, since it seems to be working, I'm not going to fret over
mysteries which can easily be explained as human error.  I note, for
example, that dmesg contains messages from multiple boots; it's
possible I read the output for the wrong boot or some such and thus got
it wrong but an mot misremembering....

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