Re: port-macppc officially dead

[Valery Ushakov <uwe%stderr.spb.ru@localhost>]

On Tue, May 17, 2016 at 19:31:37 +0300, Valery Ushakov wrote:

> On Sat, May 14, 2016 at 15:10:10 +0200, Martin Husemann wrote:
> 
> > On Sat, May 14, 2016 at 01:06:35PM +0000, Valery Ushakov wrote:
> > > Has this been pulled up, btw?  I didn't keep the original commit mail.
> > 
> > pullup-6 #1310, please someone who can actually test on -6 provide a
> > tested patch!
> 
> The two changes, to altivec.c and fpu.c, depend on new pcu(9) API.  As
> far as I understand, these are optimizations to avoid double
> book-keeping.
> 
> I will try the remaining four.

Attached patch applies the first two and the last two of the six
requested pull ups, ignoring altivec.c and fpu.c changes, as noted
above.

This seems to help the garbled conxtex problem.

I've also sent this to pullup-6.

-uwe

Index: sys/arch/powerpc/include/psl.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/include/psl.h,v
retrieving revision 1.18.8.3
diff -u -p -u -p -r1.18.8.3 psl.h
--- sys/arch/powerpc/include/psl.h	19 Nov 2015 08:50:05 -0000	1.18.8.3
+++ sys/arch/powerpc/include/psl.h	18 May 2016 01:27:08 -0000
@@ -111,7 +111,7 @@ extern register_t cpu_psluserset, cpu_ps
 #elif defined(PPC_BOOKE)
 #define	PSL_USERSET		(PSL_EE | PSL_PR | PSL_IS | PSL_DS | PSL_ME | PSL_CE | PSL_DE)
 #define	PSL_USERMASK		(PSL_SPV | PSL_CE | 0xFFFF)
-#define	PSL_USERMOD		(PSL_SPV)
+#define	PSL_USERMOD		(0)
 #else /* PPC_IBM4XX */
 #ifdef PPC_IBM403
 #define	PSL_USERSET		(PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_ME)
Index: sys/arch/powerpc/include/userret.h
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/include/userret.h,v
retrieving revision 1.22.8.4
diff -u -p -u -p -r1.22.8.4 userret.h
--- sys/arch/powerpc/include/userret.h	19 Nov 2015 08:50:05 -0000	1.22.8.4
+++ sys/arch/powerpc/include/userret.h	18 May 2016 01:27:08 -0000
@@ -58,7 +58,13 @@ userret(struct lwp *l, struct trapframe 
 	/* Invoke MI userret code */
 	mi_userret(l);
 
-	tf->tf_srr1 &= PSL_USERSRR1;	/* clear SRR1 status bits */
+	KASSERTMSG((tf->tf_srr1 & PSL_FP) == 0
+	    || l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU] == l,
+	    "tf=%p: srr1 (%#lx): PSL_FP set but FPU curlwp %p is not curlwp %p!",
+	    tf, tf->tf_srr1, l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU], l);
+
+	/* clear SRR1 status bits */
+	tf->tf_srr1 &= (PSL_USERSRR1|PSL_FP|PSL_VEC);
 
 #ifdef ALTIVEC
 	/*
Index: sys/arch/powerpc/oea/oea_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/oea/oea_machdep.c,v
retrieving revision 1.63.2.3
diff -u -p -u -p -r1.63.2.3 oea_machdep.c
--- sys/arch/powerpc/oea/oea_machdep.c	19 Nov 2015 08:50:05 -0000	1.63.2.3
+++ sys/arch/powerpc/oea/oea_machdep.c	18 May 2016 01:27:09 -0000
@@ -391,19 +391,16 @@ oea_init(void (*handler)(void))
 
         /*
 	 * Configure a PSL user mask matching this processor.
+	 * Don't allow to set PSL_FP/PSL_VEC, since that will affect PCU.
  	 */
 	cpu_psluserset = PSL_EE | PSL_PR | PSL_ME | PSL_IR | PSL_DR | PSL_RI;
-	cpu_pslusermod = PSL_FP | PSL_FE0 | PSL_FE1 | PSL_LE | PSL_SE | PSL_BE;
+	cpu_pslusermod = PSL_FE0 | PSL_FE1 | PSL_LE | PSL_SE | PSL_BE;
 #ifdef PPC_OEA601
 	if (cpuvers == MPC601) {
 		cpu_psluserset &= PSL_601_MASK;
 		cpu_pslusermod &= PSL_601_MASK;
 	}
 #endif
-#ifdef ALTIVEC
-	if (cpu_altivec)
-		cpu_pslusermod |= PSL_VEC;
-#endif
 #ifdef PPC_HIGH_VEC
 	cpu_psluserset |= PSL_IP;	/* XXX ok? */
 #endif