Subject: propose fix Vr4100 page mask lossage
To: None <port-mips@netbsd.org>
From: Toru Nishimura <nisimura@itc.aist-nara.ac.jp>
List: port-mips
Date: 04/18/2000 11:12:39
I have no Vr4100 at hand, so...
Index: locore_mips3.S
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/mips/mips/locore_mips3.S,v
retrieving revision 1.22
diff -c -r1.22 locore_mips3.S
*** locore_mips3.S 2000/04/12 01:05:35 1.22
--- locore_mips3.S 2000/04/18 02:12:11
***************
*** 2350,2355 ****
--- 2350,2356 ----
mfc0 t1, MIPS_COP_0_TLB_WIRED
move t2, a0
li v0, MIPS_KSEG0_START # invalid address
+ mfc0 t3, MIPS_COP_0_TLB_PG_MASK # -for the sake of Vr4100-
# do {} while (t1 < t2)
1:
***************
*** 2378,2383 ****
--- 2379,2387 ----
bne t1, t2, 1b
nop
+ mtc0 t3, MIPS_COP_0_TLB_PG_MASK # -for the sake of Vr4100-
+ nop
+ nop
j ra # new ASID will be set soon
mtc0 v1, MIPS_COP_0_STATUS # restore status register
END(mips3_TBIAP)
***************
*** 2394,2399 ****
--- 2398,2404 ----
dmfc0 t0, MIPS_COP_0_TLB_HI # save current ASID
mfc0 t1, MIPS_COP_0_TLB_WIRED
li v0, MIPS_KSEG0_START # invalid address
+ mfc0 t2, MIPS_COP_0_TLB_PG_MASK # -for the sake of Vr4100-
dmtc0 v0, MIPS_COP_0_TLB_HI # make entryHi invalid
dmtc0 zero, MIPS_COP_0_TLB_LO0 # zero out entryLo0
***************
*** 2413,2418 ****
--- 2418,2424 ----
nop
dmtc0 t0, MIPS_COP_0_TLB_HI # restore ASID
+ mtc0 t2, MIPS_COP_0_TLB_PG_MASK # -for the sake of Vr4100-
nop
nop
j ra